Automotive, industrial, and distributed power supplies often require buck converters to step down their poorly regulated outputs to produce the plurality of rails used by low voltage mixed signal systems. These supplies subject the step-down converters to a vast assortment of supply voltage transients, underscoring the need for rugged and efficient buck converters that provide tightly regulated outputs from a wide range of input voltages. The LT3692A, a monolithic dual 3A step-down converter, satisfies power demands imposed by these systems. Its wide 3V–36V input operating range and overvoltage transient protection up to 60V, allows it to easily reign in unruly automotive or industrial sources. Flexible configuration options allow the designer to power the LT3692A from one or two separate input supplies while producing two independent outputs, or to parallel the outputs to create one high current supply.
A True Dual Switcher
The LT3692A simultaneously offers high performance, high power, uncompromising features and high voltage operation in a dual monolithic switching converter. The two buck channels of the LT3692A shown in Figure 1 are completely independent. The channels can have different input voltages, output voltages, current limits, power good outputs, soft-start, undervoltage lockouts and even different synchronized switching frequencies. Independent programmable undervoltage lockout permits a customizable operating range within 3V to 36V while withstanding up to 60V input transients.
Figure 1. Compact, dual-output converter produces 5V/2A and 3.3V/2A outputs from a 6V–36V input.
The LT3692A tolerates low line conditions as well, thanks to an enhanced dropout scheme, which maintains greater than 95% maximum duty cycles regardless of switching frequency. Two independent programmable output current limits minimize component size and provide overload protection, while independent soft-start eliminates input current surges during start-up. Channel-independent internal thermal shutdown circuitry lends additional overload protection by allowing one switcher to continue operating despite a brief overload on the other channel.
Programmable power good pins, combined with a die junction temperature output pin, greatly simplify power sequencing and the task of monitoring the LT3692A supply. Adjustable or synchronized fixed-frequency operation spans 250kHz to 2.25MHz and a synchronized clock output allow multiple regulators to be synchronized to the LT3692A. A unique clock divide feature optimizes solution size, efficiency and system cost by permitting channel 1 to operate at a synchronized frequency 1-, 2-, 4- or 8-times slower than the master clock frequency. The combination of a wide feature set and independent channel operation simplifies complex power supply designs.
Undervoltage and Overvoltage Lockout
A switching regulator appears as negative impedance to the source, potentially causing a latched fault if the source voltage drops and the regulator draws increasingly more current. Programmable undervoltage lockout (UVLO) offers an easy way to avoid this problem by preventing the buck converter from drawing current if the input voltage is too low to support full load operation. Overvoltage lockout (OVLO), on the other hand, prevents the converter from operating above its desired range. A default undervoltage and overvoltage lockout is internally set to 2.8V and 36V, respectively, but can be programmed to any value.
Referring to Figure 2, the LT3692A enters shutdown if SHDN1 is below 1.3V or VIN1 falls below 2.8V, protecting battery-powered systems from excessive discharge. All internal regulators are controlled by channel 1, effectively shutting down the entire IC if channel 1 enters shutdown. With sufficient VIN voltage, Channel 1 is allowed to operate if SHDN1 exceeds 1.3V. The single voltage divider composed of the R1/R2 or R3/R4 combination controls the UVLO levels.
Figure 2. Block diagram shows undervoltage and overvoltage lockout functionality of the LT3692A.
The circuit in Figure 3 shows how the LT3692A can be configured for programmable UV/OVLO on one channel while utilizing the default UV/OVLO protection on the other channel.
Figure 3. Dual converter with default and programmable UV/OVLO.
A shutdown UV/OVLO or overtemperature condition causes an internal power-on reset latch to be enabled, discharging the soft-start and VC pin capacitors. This latch remains set until the shutdown condition terminates, whereupon the LT3692A initiates a full start-up sequence. The soft-start voltage waveforms in Figure 4 show how the calculated UV/OVLO limits in Figure 3 protect the LT3692A during undervoltage and overvoltage power supply transients.
Figure 4. Soft-start voltage during UVLO/OVLO.
Programmable Power Good and Start-Up Sequencing
The LT3692A provides access to the positive inputs of the power good (PG) comparators via the CMPI pins. Each negative comparator input is fixed at 0.72V to allow tying of the input to the feedback pin (806mV reference) for a standard 90% power good signal. Other inputs (divided down) could come from the internal junction temperature pin (TJ) for overtemperature indication or the input voltage to indicate input power good. The comparator output could be tied to one of the soft-start pins to disable a channel, the DIV pin to change the frequency, the ILIM pin to reduce the current, or any external device to communicate information. These comparators are versatile and allow for custom, compact solutions.
Start-up sequencing and control is vitally important in modern electronics. Complex output tracking and sequencing between channels can be implemented using the LT3692A’s SS and PG pins. Figure 5 shows various output start-up waveforms and their associated schematics.
Figure 5. Soft-start pin configurations.
The SS pins also double as independent channel shutdown pins. Pulling either channel’s soft-start pin below 115mV disables switching for that channel.
Programming the Switching Frequency
Programming the LT3692A switching frequency could not be easier. The RT/SYNC pin accurately sources 12µA, so only a single resistor (RSET) is required to set the pin voltage and thus the switching frequency as given by the following: RSET(kΩ) = 1.86E–6 • fSW2 + 0.0281 • fSW – 1.76 with the switching frequency (fSW) in kHz for frequencies between 150kHz and 2.25MHz.
Figure 6. Switching frequency vs RT/SYNC resistance.
To avoid start-up problems, the LT3692A limits the minimum switching frequency to a typical value of 110kHz. This feature, coupled with adding a small capacitor in parallel with the frequency-programming resistor, adds a user-programmable frequency foldback function during start-up.
Eliminate the Clock
More rails mean more converters. If any of those converters are operating at different frequencies, then the interference beat frequencies produce radiated and conducted EMI in addition to the switching fundamental and harmonic frequencies. For example, a converter switching at 1.015MHz and a converter switching at 1.005MHz combine for a beat frequency of 10kHz, right in the audio band.
Beat frequencies can easily interfere with any signal path with similar frequencies. Traditionally, the solution involves synchronizing the converters by means of an external oscillator. The LT3692A outputs a 0-to-2.5V square wave on the CLOCKOUT pin, which matches its free running internal oscillator or the signal on the RT/SYNC pin. Since the LT3692A can be used as an oscillator source, this eliminates the need for an external oscillator, reducing cost and solution footprint. The circuit in Figure 7 shows how the CLOCKOUT signal can synchronize two LT3692A converters operating at 1MHz. A single high current 3.3V/10A output rail is created by connecting the VOUT, FB, SS and VC pins between the two LT3692As. Additionally, the finite synchronization signal-to-switch delay allows the four channels to be synchronized with a 90° phase shift between each channel (shown in Figure 8), reducing the output voltage ripple and bulk input and output capacitances.
Figure 7. 3.3V, 10A 4-phase converter with UVLO, power good, 120°C junction temperature flag, and minimal input current ripple.
Figure 8. 4-phase converter switch waveforms.
LT3692A Synchronization
The LT3692A RT/SYNC input offers a unique synchronization feature—the duty cycle of the input synchronization signal controls the switching phase difference between the two channels. Channel 1’s rising switch edge synchronizes to the rising edge of the signal; channel 2’s rising switch edge synchronizes to the falling edge of the signal. By varying the synchronization duty cycle, the LT3692A dual switches can be operated anti-phase and in some cases non-overlapping, effectively reducing the input current ripple and required input capacitance.
For example, the input ripple voltage shown in Figure 9 has a peak of 472mV for a typical anti-phase dual 14.4V-to-8.5V and 14.4V-to-3.3V regulator. Figure 10 shows that the input ripple voltage is decreased to 160mV by driving the LT3692A with a 71% duty cycle synchronization signal to generate a 256° phase shift between the channels.
Figure 9. Dual 14.4V/8.5V, 14.4V/3.3V with standard 180° phase shift between channels.
Figure 10. Dual 14.4V/8.5V, 14.4V/3.3V with 256° phase shift between channels shows significant reduction in input voltage ripple. Phase shift is programmed by the duty cycle of the input synchronization signal.
Dropout Enhancement
Switching regulator dropout performance is vitally important in systems where the input voltage may drop close to, and sometimes below, the regulated output voltage. During a low input voltage condition, the converter should supply an output voltage as close to the regulation voltage as possible in order to keep the output running. Ideally, in such cases, the switching regulator would run at 100% duty cycle, simply passing the input to the output, but this is not possible because of the minimum switch off-time, which limits the switching duty cycle.
Because the minimum switch off-time is a fixed value, the maximum switching duty cycle can be increased simply by decreasing the switching frequency, but a lower switching frequency necessitates larger filter components to achieve low output voltage ripple. The LT3692A circumvents dropout limitations by keeping the monolithic high side switch on for multiple switch cycles, only terminating the extended switch cycle when the boost capacitor needs to be recharged. This unique dropout switching technique allows the LT3692A to achieve up to a 95% maximum duty cycle, independent of switching frequency. The graph in Figure 11 compares the dropout performance of a LT3692A to a similar buck converter at 200kHz and 2MHz. Both converters show similar dropout performance at 200kHz; however, at 2MHz, the LT3692A regulates the output to 5V at a much lower input voltage.
Figure 11. The LT3692A dropout enhancement feature improves dropout performance over a standard buck regulator at high switching frequencies.
Never Skip a Pulse
High frequency switching permits smaller components, but it also means shorter pulse widths. Buck converters have inherent minimum on-times that prohibit high step-down ratios at high frequency. When the input voltage rises too high, the converter skips a pulse. Though using the built-in pulse skipping inherent in many buck converters sounds appealing, the output voltage ripple suffers significantly, as shown in Figure 12.
Figure 12. Many regulators will enter pulse-skipping mode when they can’t support the large step-down ratio that occurs when the input voltage rises too high. The pulse-skipping solution is automatic and easy, but it significantly increases output noise.
Pulse skipping can be avoided by reducing the switching frequency, but in a dual converter, one channel may benefit from switching at a higher frequency than the other channel. For instance, consider a dual buck converter with an input voltage range of 7V to 36V and output voltages of 5V and 1.8V. At the high end of the input voltage range, the switching frequency required to avoid pulse skipping on the 5V channel is almost three times greater than that required by the 1.8V channel. By running a dual converter at the lower frequency—chosen to avoid pulse skipping on the 1.8V channel—the 5V channel requires inductor and capacitor values that are three times larger than it would if run at the higher frequency.
The LT3692A avoids this predicament by adding a DIV pin that divides the clock by 1, 2, 4, or 8, allowing channel 1 to run at a lower synchronized frequency. Figure 13 shows an application that runs at 250kHz and 1MHz for the low voltage and higher voltage channels, respectively. Figure 14 shows the switching waveforms. If channel 1 (VOUT = 1.8V) runs at 1MHz, the maximum input voltage for constant output voltage ripple is only 15V, but at 250kHz the maximum voltage for constant output ripple exceeds the LT3692A overvoltage limit of 38V. Table 1 shows the maximum input voltage for constant output voltage ripple for various switching frequencies.
Figure 13. The LT3692 can avoid pulse skipping by decreasing the operating frequency of its low voltage channel, while leaving the higher voltage channel at a higher frequency. By running the higher voltage channel at a higher switching frequency, one can still use a small inductor and output capacitor for that channel. Here, channel 2 (5V) runs four times faster than channel 1 (1.8V) by setting the DIV pin to 1.2V.
Figure 14. A 5V and 1.8V dual multi-frequency converter avoids pulse-skipping mode for each channel throughout the input range while minimizing component sizes on each channel.
| Frequency (kHz) | RT/SYNC (kΩ) | VIN(MAX) (V) |
| 250 | 5.90 | 38 |
| 500 | 13.0 | 30 |
| 1000 | 28.0 | 15 |
| 1500 | 44.2 | 10 |
| 2250 | 69.8 | 6 |
Independent Supply Inputs
Separate input supply pins (VIN1/VIN2) allow the LT3692A’s two channels to be operated in cascade, with the output of one buck powering the input of the other. A cascade configuration allows high input/output ratios at high frequencies while simultaneously creating two rails. For instance, the converter in Figure 15 is designed for 3.3V/2.5A at 550kHz and 1.2V/1A at 2.2MHz across the full input voltage range.
Figure 15. A 3.3V and 1.2V dual 2-stage converter.
The benefits of cascading both converters on the same chip are numerous:
- The switching frequency is already synchronized with anti-phase switching to reduce ripple
- Custom start-up options are readily available
- Pulse-skipping mode is easily avoided
- The overall solution takes much less space than multi-IC solutions.
One Size Doesn’t Fit All
Even if a switching regulator, such as the LT3692A, can safely withstand overload conditions, all the external components, such as the inductors and diodes, must be sized to withstand steady-state overload conditions as well. If the maximum load drawn from a buck output is 1A, but the buck converter’s internal current limit is set to 4A, then all external components must be rated for the maximum 4A load in order to ensure safe functionality. By sizing the external components for fault conditions, rather than typical operating conditions, the overall solution tends to be oversized and unnecessarily expensive.
The LT3692A remedies this problem by providing an independent current limit pin (ILIM). If full output current capability is not needed on one or both channels, the user-selectable current limit allows the use of smaller, cheaper components. Each channel’s current limit can be set from 2A to 4.8A by the ILIM pin voltage. An accurate 12µA internal current source allows the current limit to be programmed with a single external resistor or voltage on the ILIM pin. The ILIM pin may be grounded as well, limiting the maximum output current to 2A. This feature allows the user to implement current foldback during start-up simply by placing a small value capacitor in parallel with the current-limit-programming resistor. The 12µA internal current source charges the optional ILIM cap from zero volts to its final steady-state value, allowing the current limit to gracefully ramp from 2A to 4.8A.
Board space is significantly reduced by using the ILIM feature, as shown in Figure 16. By employing the ILIM pin function, as well as operating the channels in cascade with independent switching frequencies, the power components from the circuit in Figure 15 reduce board space 3-fold, underscoring the usefulness of the ILIM pin.
Figure 16. Comparison of two designs for a dual-output 3.3V/2.5A and 1.2V/1A converter using the LT3692A. The smaller version of the circuit saves board space by taking advantage of features that the larger circuit does not, including current-limiting the outputs, cascading the channels and running the two channels at different switching frequencies.
Overload Conditions
If the load exceeds the maximum output current, the output voltage drops below the normal regulation point. The drop in output voltage activates the VC pin clamp and discharges the SS capacitor, lowering the SS voltage. The LT3692A regulates the feedback voltage to the lowest voltage present at either the SS pin or the internal 806mV reference. As a result,the output is regulated to the highest voltage that the maximum output current can support. Once the overload condition is removed, the output soft-starts from the temporary voltage level to the normal regulation point.
Figure 17 shows the output voltage and inductor current for the 1.2V channel in Figure 15 when loaded by a 0.2Ω load. As the ILIM pin voltage is varied from 0V to 1.5V, the output voltage is regulated between 0.32V and 0.96V, limiting the current between the range of 1.6A and 4.8A.
Figure 17. Current limit programming with ILIM voltage.
Watts from Here and Watts from There
Ever wanted to draw power from a rail, but needed just a few more watts? A last-minute increase in power requirements leaves you stuck in a bind? Now you can draw power from two different sources with programmable limits for each source. The independent VIN and ILIM pins allow the two independent input supplies in Figure 18 to be programmed to different current limits. With the SS, VC, and VOUT pins tied together, the two inputs serve a single output rail. The power drawn from each rail is shown in Figure 19. This solution provides flexibility in rail voltages and utilization of available power, making it easy to solve power-sharing problems.
Figure 18. Dual input single 3.3V output converter.
Figure 19. Power draw from two sources for single output.
Always Know Your Junction Temperature
The LT3692A TJ pin outputs a voltage proportional to the internal junction temperature. At a junction temperature of 25°C, the TJ pin outputs 250mV and has a slope of 10mV/°C. Without the aid of external circuitry, the TJ pin output is valid from 20°C to 150°C with a maximum load of 100µA. To extend the operating temperature range of the TJ output below 20°C, connect a resistor from the TJ pin to a negative supply as shown in Figure 20. The negative rail voltage and TJ pin resistor may be calculated using the following equations:
where TEMPMIN is the minimum temperature where a valid TJ pin output is required. VNEG = regulated negative voltage supply.
Figure 20. Circuit to extend TJ operating region.
For example,
The simple charge pump circuit in Figure 21 uses the CLOCKOUT pin output to generate a negative voltage, eliminating the need for an external regulated supply. Surface mount capacitors and dual-package Schottky diodes minimize the board area needed to implement the negative voltage supply.
Figure 21. Negative rail generated from CLOCKOUT.
Conclusion
The LT3692A squeezes two complete regulators, including dual monolithic 3.8A switches, into a 38-lead exposed pad TSSOP or a 5mm × 5mm 32-lead exposed pad QFN package. The two channels operate independently, making it possible to produce two high performance buck converters with one part, thus minimizing circuit size and simplifying complex designs. Separate soft-start, current limit, power good, and UV/OVLO features enable the designer to address unique power sharing, solution area, and start-up sequencing requirements. With a wide operating range and a rich feature set, the LT3692A easily tackles a wide variety of automotive, industrial and distributed supply challenges.
Notes:
* Many thanks to Scott McClusky for his assistance in producing this article
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