Expanding the rail-to-rail, voltage output DAC family, Analog Devices introduces two new voltage output DACs that break the size/bits barrier. The LTC1658 is a 14-bit rail-to-rail voltage output DAC in a tiny MSOP-8 package and the LTC1655 is a 16-bit voltage output DAC in an SO-8 package. Both of these DACs also provide a convenient upgrade path for users of LTC’s 12-bit voltage output DAC family. The LTC1658 draws only 270µA from a 3V or 5V supply and is 14-bit monotonic over temperature. The LTC1655 draws 600µA from a 5V supply and is 16-bit monotonic over temperature. These DACs have a flexible 3-wire serial interface that is SPI/QSPI and MICROWIRE compatible.
Figures 1 demonstrates the ease of using the LTC1658. The output swings from 0V to VREF at full-scale. VREF should be less than or equal to VCC to prevent the loss of codes and degradation of PSRR near full-scale. The input serial data is loaded as one 16-bit word with two dummy bits. The digital inputs are TTL/CMOS level compatible and the CLK input has an internal Schmitt trigger for noise immunity. This allows direct optocoupler interfacing to the part. Figure 2 plots the part’s 0.25LSB typical DNL.
Figure 1. LTC1658 block diagram.
Figure 2. The LTC1658 14-bit rail-to-rail DAC in MSOP has 0.25LSB typical DNL.
A typical application for the LTC1655 is shown in Figure 3. The LTC1655 has the same interface as the LTC1658 and is also capable of being daisy chained. There is an onboard 2.048V bandgap reference connected internally to the 16-bit DAC. The rail-to-rail output nominally swings from 0V to 4.096V, since there is a gain of two in the output amplifier. The reference pin can be overdriven to a value higher than 2.048V if a larger output swing is desired. Since there is a gain of 2 from the reference pin to the output at full-scale, the voltage on the REF pin must always be less than VCC /2. Figure 4 plots the typical DNL of the LTC1655.
Figure 3. LTC1655 block diagram.
Figure 4. LTC1655 typical DNL plot.
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