Versal HBM Non-Hardware Verified Design

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概要

コンポーネントのデジタル・インターフェースとを介して通信するために使用されるCコードやFPGAコードなどのソフトウェアです。

The Versal^™ HBM series features heterogeneous integration of fast memory, secure connectivity, and adaptive compute to eliminate processing and memory bottlenecks for memory-bound, compute-intensive workloads such as machine learning, database acceleration, next-generation firewalls, and advanced network testers. Analog Devices has worked closely AMD to develop verified power solutions that optimize cost, size and efficiency in high performance applications.
ADI provides supporting documentation including LTpowerPlanner and applicable LTpowerPlay configuration files to enable you to validate the power solution for your application seamlessly. For a complete list power designs and use cases, please contact your local local FAE.
ADI has also completed a complete power evaluation report for Mid-High Voltage rails. For a complete report please submit your interest here.

Key power regulators are used for this device as follows:

Rail/Function	Part Number(s)	Description
VCCINT	LTC3888-1	Dual Loop 8-Phase Step-Down DC/DC Controller with Digital Power System Management
VCCINT	LTC7051	SilentMOS Smart Power Stage in 5mm × 8mm LQFN
SYS 5V, SYS 3V	LTC3633A	Dual Channel 3A, 20V Monolithic Synchronous Step-Down Regulator
VCCAUX, GTAVCC	LT8652S	Dual Channel 8.5A, 18V, Synchronous Step-Down Silent Switcher with 16µA Quiescent Current
VCCO_xxx, VCCINT_HBM	LT7200S	Quad 18V, ±5A Synchronous Monolithic Step-Down Regulator
GTAVTT	LTC7151S	20V, 15A Synchronous Step-Down Silent Switcher 2 Regulator
VCCAUX_HBM, MGTYAVCCAUX	ADP125	5.5 V Input, 500 mA, Low Quiescent Current, CMOS Linear Regulators
DDR	LTC3617	±6A Monolithic Synchronous Step-Down Regulator for DDR Termination
DDR	LTC3618	Dual 4MHz, ±3A Synchronous Buck Converter for DDR Termination