MAX20796 Overcurrent Protection Features

Introduction

The MAX20796 offers average overcurrent protection (OCP) in the form of primary and fast peak OCP in the powertrain.

The response for an average OCP can be selected from PMbus command as either latch-off or retry after 50ms, and the average threshold is also user-configurable from the pin-strap resistor.

The fast peak OCP in the powertrain has a fixed OCP threshold and it is a cycle-by-cycle protection. This application note discusses both these features in depth in the following sections.

Average OCP

The MAX20796 implements the average OCP by reading back the current information from the loop.

The loop diagram is shown in Figure 1, the output voltage is fed into the control loop with differential remote-sense pins SENSEN and SENSEP. The first error amplifier stage (A1) is a differential amplifier, which provides a proportional output of the error between the reference voltage (V_CM) and the remote-sensed voltage. The output voltage (V_ERR) of the first stage is fed into the voltage loop amplifier (GM1) with a proportional integral (PI) filter.

The output voltage V_IDES of the amplifier GM1 goes to the second voltage loop amplifier GM2. The output current I_DES of GM2 is compared to a total sensed phase current (I_{L_TOT}) and generate the current-loop error amplifier input V_ERR.

The I_{L_TOT} is the total current sensed from the powertrains with a gain of 1/200k. Since there are proportional gains and an integrator with the current amplifier GM3, the DC going to the current loop is zero. Therefore, in steady state the I_DES is forced to be equal to the DC component of I_{L_TOT} plus small current ripples which are averaged by the loop.

Therefore, in the steady state,

V_IDES is proportional to the average output current with a fixed ratio.

The MAX20796 reads V_IDES voltage with a ratio and feeds the voltage into the OCP comparator and compares it to the OCP threshold as shown in Figure 1. The OCP threshold is programmable by connecting a resistor to the PGMD pin and the OCP threshold can be set from 10A to 33.3A in each phase. Refer to the MAX20796 data sheet.

When the V_IDES voltage reaches the threshold, the OCP block flips an analog flag to the digital core and shut down the power stage. The digital core has a deglitch filter of 50 cycles and the clock frequency 16MHz (±10%), which is approximately 3.3µs.

Once an OCP fault is triggered, switching is stopped and PGOOD is de-asserted. Depending on the I_{OUT_OC_FAULT_RESPONSE} command setting, the regulator begins "Shutdown and Retry" (factory default) after about 50ms or "Shutdown only" without restart. The shutdown and retry continues until the load current falls below the threshold. Refer to MAX20796 PMBus Command Set User Guide.

During the transient response due to a load jump-up, the output voltage dips and then recovers back to regulation. This voltage train set causes V_IDES voltage to have a short overshoot. How large is the overshoot and how long it takes to settle depend on the load step and the loop response time or bandwidth.

In most applications with load changes at the output, the V_IDES transient overshoot is small and does not cause false OCP trigger. However, with the severe large load change and slow loop response, the overshoot of V_IDES might reach the OCP threshold and trigger the OCP In this case, there is a need to consider improving the loop bandwidth or placing more capacitors at the output to reduce the output dip and accelerate the loop response.

Peak OCP

If the output current rises very rapidly or there is a short-circuit condition, a secondary OCP protection inside the powertrain can limit the maximum current until the OCP protection circuit reacts and shuts down the switching.

The MAX20796 has an instantaneous cycle-by-cycle peak current protection in each powertrain. Its threshold is fixed as shown in the Electrical Characteristics table of the MAX20796 data sheet. Once the power-stage peak OCP is triggered, the relevant phase turns off high-side FET and turns on its low-side FET to keep its peak current at a safe level. Since the protection is based on the instantaneous current, the ripple current must be considered when calculating the maximum current per phase.