AN-2640: Shaping Loop Response in Synchronous Buck Converters with Feedforward Capacitance

Introduction

The stability and bandwidth of an internally compensated DC-DC power supply can be enhanced using a feedforward capacitor. The LT80x0x series is a family of internally compensated synchronous buck converters that employ peak-current-mode control. The bandwidth and phase margin of these converters depend on internal parameters and the output capacitance used. These loop characteristics, in turn, dictate the converter's transient performance.

Adding a feedforward capacitor improves both the transient response and the loop characteristics. When placed across the upper feedback resistor, this capacitor introduces a zero and a pole into the control loop. By carefully positioning this zero-pole pair, the converter's frequency response and transient behavior can be optimized.

This application note presents strategies for selecting an appropriate feedforward capacitor for the LT80605 to achieve specific loop response characteristics, including bandwidth, phase margin, and gain margin. These strategies are also applicable to other internally compensated buck converters from Analog Devices, Inc.

Effect of Feedforward Capacitor

This section describes how a feedforward capacitor affects the control-loop characteristics of an internally compensated buck converter.

Transfer Function

The output voltage can be programmed with a resistor divider (R_FB-TOP and R_FB-BOT) between the output and the FB/V_OS pin. The capacitor C_FF is added across R_FB-TOP to form the feedforward network.

The V_OUT to V_FB transfer function without the capacitor (C_FF) is given in Equation 1.

On adding C_FF, the transfer function is modified as shown in Equation 2.

where ωFFZ is zero and ωFFP is the pole introduced by C_FF.

where α = V_OUTV_REF.

Figure 2 and Figure 3 illustrate the frequency response plots with and without the feedforward capacitor. The DC gain is the same for both transfer functions. As illustrated in Figure 3, the gain begins to increase at approximately +20dB per decade due to the zero f_FFZ. The zero is the source of the phase boost. The phase-margin improvement depends on the capacitor's placement relative to the crossover frequency. The gain flattens to a constant value set by the pole f_FFP.

Maximum Gain and Phase Boost

A key consideration in feedforward capacitor design is that the achievable gain and phase boost are inherently limited. The feedback resistor ratio sets the upper bounds on both gain and phase enhancement, and it is directly determined by the output voltage. The maximum phase boost occurs at the geometric mean of the zero and pole frequencies, as shown in Equation 6.

The maximum achievable phase boost is given in Equation 7.

Similarly, the maximum achievable gain is given in Equation 8.

These upper bounds define the achievable performance limits. Comparing the required gain or phase boost against these limits indicates whether a feedforward capacitor can meet the design objectives or whether the design requires changes to parameters such as output capacitance or switching frequency.

Ensure that only the zero frequency can be adjusted through component selection. The pole location is determined by the output voltage and the feedback regulation voltage (V_REF) as indicated in Equation 5. Ensure proper placement of the zero, as it enhances the loop response and, consequently, improves the converter's transient performance.

This relationship has significant implications for the effectiveness of the feedforward capacitor. In applications where V_OUT is significantly greater than V_REF, the zero and pole are widely separated. This separation results in substantial gain contribution and provides greater flexibility in positioning the zero to achieve the desired loop response. In low-output-voltage applications where V_OUT is close to V_REF, the zero and pole are closely spaced. The gain contribution and the achievable phase boost are constrained. This narrows the optimization range for C_FF selection. Table 1 summarizes the achievable gain and maximum phase boost for various output voltage levels. The maximum phase boost achievable with a feedforward capacitor is 61° at 12V output, whereas it is only ~6° at 1V output.

The following sections outline C_FF selection methods for specific design objectives within these constraints.

Design Methodology

Determine Baseline Loop Characteristics

The first step in designing a feedforward network is to characterize the loop response without C_FF. This can be achieved using a network analyzer or estimated with LTpowerCAD, although a network analyzer provides greater accuracy.

Design Trade-offs

Feedforward capacitor selection involves balancing multiple loop performance metrics, including crossover frequency, phase margin, and gain margin. Improving one metric often affects the others because C_FF introduces a zero-pole pair in the feedback network. Consequently, C_FF selection can be approached from two perspectives, depending on the parameter most critical to the application:

1. Target Crossover Frequency: Applications requiring fast transient-response recovery typically target a higher crossover frequency. Calculate and optimize CFF to achieve the desired crossover frequency, with the resulting phase and gain margins determined by the loop response. This approach is most effective when the baseline phase margin is already adequate and limited bandwidth is the primary constraint.
2. Target Phase Boost: Applications with limited stability margin should target a desired phase margin and select CFF such that the maximum phase boost occurs near the crossover frequency. The resulting crossover frequency is then determined by the loop response. This approach is most effective when the baseline design exhibits excessive ringing or fails to meet the target phase-margin requirement.

Most applications require simultaneous optimization of crossover frequency and phase margin. Consequently, CFF selection is typically iterative: select an initial value based on the dominant constraint, evaluate the loop response, adjust CFF, and repeat until the design objectives are satisfied.

Selecting Feedforward Capacitor for Target Crossover Frequency

This section describes how to select a feedforward capacitor to achieve a target crossover frequency. The loop-gain slope at crossover for a well-designed peak-current-mode converter is -20dB/decade.

To achieve the target crossover frequency, solve for the required zero frequency using Equation 9.

where f_cd is the desired crossover frequency and f_co is the crossover measured using a network analyzer without C_FF.

Equating Equation 3 and Equation 9 provides the initial C_FF value for the target crossover frequency, as shown in Equation 10.

Selecting Feedforward Capacitor for Target Phase Boost

This section describes how to select a feedforward capacitor to achieve a target phase boost. From the baseline loop measurement, let the crossover frequency be f_CRO. If the phase margin at f_CRO is insufficient, adding a feedforward capacitor can provide the required phase boost by introducing a zero into the loop response.

The effectiveness of this phase boost depends on the zero location relative to the target frequency. To achieve a specified phase boost at fCRO, the zero frequency can be determined using Equation 11.

where θ_desired is the desired phase boost.

Equating Equation 3 and Equation 9 provides the initial C_FF value for the target crossover frequency, as shown in Equation 13.

Experimental Verification

The subsequent sections apply the feedforward capacitor selection methodology to the LT80605 and evaluate its effect on loop response and transient performance. Ensure that the same design logic can be extended to any internally compensated peak-current-mode converter.

Design Example 1

Table 2 shows the input specification and target loop characteristics required for a 12V application circuit with 400kHz switching frequency. Refer to the LT80605 datasheet for application-circuit component selection.

Figure 4 shows the schematic used to measure the crossover frequency without the feedforward capacitor installed. Resistors R3 and R4, together with capacitor C15, form the feedforward network. Figure 5 shows the corresponding frequency response with C15 left open. For additional information on the evaluation board, refer to the LT80605 User Guide.

The loop characteristics measured with a network analyzer are summarized in Table 3.

Only a modest phase boost is required to meet the target specification. Substituting, F_CO = 34kHz, F_CD = 35kHz, V_REF = 0.8V, V_OUT = 12V, and a target phase boost of 20° into Equation 13 yields a calculated 𝐶𝐹𝐹value of 1.77 pF. Figure 6 shows the measured loop response with a 2.2pF 𝐶_𝐹𝐹 capacitor installed.

Figure 7 compares the converter transient response with and without the feedforward capacitor. Adding a 2.2pF 𝐶_𝐹𝐹 improves the transient response by reducing the recovery time following a load transient.

Design Example 2

The LT80605 provides a unique operating mode when the RT pin is tied to INTV_CC. In this configuration, the device selects internal compensation parameters optimized for high-bandwidth operation, enabling loop bandwidths greater than 150kHz. The increased bandwidth improves transient response, reduces output capacitance requirements, and minimizes overall solution size. Table 4 summarizes the input specifications and target loop characteristics for a 5V application operating at a 2.1MHz switching frequency.

Figure 8 shows the schematic of the 5V application circuit configured for a 2.1MHz switching frequency. Figure 9 shows the measured frequency response without the feedforward capacitor.

Design Example 2

The LT80605 provides a unique operating mode when the RT pin is tied to INTVCC. In this configuration, the device selects internal compensation parameters optimized for high-bandwidth operation, enabling loop bandwidths greater than 150kHz. The increased bandwidth improves transient response, reduces output capacitance requirements, and minimizes overall solution size. Table 4 summarizes the input specifications and target loop characteristics for a 5V application operating at a 2.1MHz switching frequency.

Figure 8 shows the schematic of the 5V application circuit configured for a 2.1MHz switching frequency. Figure 9 shows the measured frequency response without the feedforward capacitor.

Using Equation 10, the initial value of C_FF is calculated as 5.6pF. Figure 10 shows the corresponding frequency response. The resulting crossover frequency falls short of the target bandwidth. As shown in Figure 3, increasing C_FF shifts the frequency response to lower frequencies and increases the loop gain. Figure 11 shows the frequency response with C_FF = 10pF. In this configuration, the crossover frequency, phase margin, and gain margin are 188kHz, 66°, and −12.7dB, respectively, meeting the target loop-performance requirements.

Transient response with and without C_FF is shown in Figure 12.

Summary

For internally compensated DC-DC converters, adding a feedforward capacitor across the upper feedback resistor improves the converter's frequency response and transient performance. Although datasheets often recommend feedforward capacitor values for typical application circuits, most practical applications require a targeted approach to selecting the optimal value.

This application note presents a design framework for selecting a feedforward capacitor to achieve either a desired crossover frequency or a desired phase boost. Design examples demonstrate the methodology for selecting the feedforward capacitor.

The calculated optimal value can be adjusted upward or downward to achieve the desired crossover frequency or to maximize phase margin. The gain and phase boost from the feedforward capacitor depend on the programmed output voltage. In higher output-voltage configurations, the CFF zero and pole are farther apart, yielding greater gain and phase boost. In contrast, in lower output-voltage configurations, the achievable gain and phase boost are limited.

著者

Adarsh Rajagopal

Adarsh Rajagopal is a Staff Engineer in the Product Applications Group at Analog Devices, focusing on high performance power products. He works closely with customers and design team to define and support next-generation power management solutions. Adarsh joined Maxim Integrated, now part of Analog Devices, in 2018, and received his master's degree in Power Electronics from the Indian Institute of Technology Bombay (IIT Bombay).