# Simulating Power Planes with LTspice

When designing Power Distribution Networks (PDN) it is common to use SPICE models to represent the planes. High-end designs use 2D/3D electronic magnetic modeling tools to extract SPICE models. However, there are times when a simple spice model will suffice, or you may not always have access to very expensive 2D/3D modeling tools. With a few simple tricks, PDN designs can be modeled with LTspice up to about 3GHz.

Many times a PDN can be considered as a two-plane rectangle in the PCB, either because the actual layout is small and rectangular, or can be approximated with a small rectangle. When this is the case, one can first model the plane with an analytical tool, build an LTspice model, and then with some trial and error tune the LTspice model to match the analytical model. The results will come reasonably close to PDN measurements. In this post, I will demonstrate how to build the LTspice model from an analytical model. Then I will show measurement data from a proto board demonstrating the limitations of the technique.

There is a good analytical model spreadsheet from Istvan Novak that can be downloaded at http://www.electrical-integrity.com. On the tools page, look for the model that says, “It calculates the self impedance of a bare rectangular parallel plates at arbitrary locations.” Let’s proceed with an example using this model.

Suppose we have a 2 inch square plane with 0.003 mils separation built with FR4. Also assume that the load is in the center of the plane, and that the best impedance model is at the center of the square. Putting these parameters into the model we get the following results.

The planes look like a capacitor out to 600MHz, then they look like an inductor out to about 3GHz, and finally things get weird because we are dealing with a resonant cavity. A good LTspice model should account for the capacitance, the inductance,
and the first resonance peak. A useful SPICE model can be found in the DesignCon 2013 paper titled “Innovative PDN Design Guidelines for Practical High Layer‐Count PCBs” by Shringarpure, Pan, and Kim. Here is the figure from the paper with the basic model, which includes the ecoupling capacitors and feedthrough inductances:

The plane portion of the model is the middle piece, so we begin with that.

The next step is to estimate the capacitance and inductance of the planes by using points on the graph from the analytical model.

We make an educated guess at LIC, which models the resonance peak, by choosing 100pH. Now we divide the C and L by 1/2 and we have our first model.

Clearly the plane resonance peak is not near 3GHz, so the next step is to iteratively modify LIC until the peak moves near 3GHz and matches the analytical model, and then fine tune the other elements until we match the analytical model. When LIC is 8pF, and LP1 and LP2 are 42pF, the SPICE model matches the analytical model.

However, the cavity resonances are missing, because the SPICE model does not have elements to represent them. This plane model is usable to about 4GHz, assuming the rectangular plane adequately represents the actual PCB shapes. With the plane model in place, we can continue modeling the rest of the PDN by adding capacitors modeling feedthroughs, following the model in the DesignCon paper. For example, here is a model of a Point of Load (POL) proto board:

The target impedance of this PDN was 10mΩ out to 10MHz.