DS1077 5V EconOscillator Architecture and Online Interactive Frequency Calculator

DS1077 5V EconOscillator Architecture and Online Interactive Frequency Calculator

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The DS1077 is a programmable (via 2-wire) dual-output EconOscillator with thousands of possible combinations of frequency outputs available. This application note describes the architecture and capabilities of the DS1077 to give the design engineer an intuitive understanding of the part to ease integration into a design. A link to an online interactive frequency calculator (based on Microsoft Excel) is given. This allows the engineer or design manager to quickly evaluate the device to determine if a specific frequency needed for an application is possible with a minimum amount of effort.

EconOscillator Architecture Quick Overview and Interactive Calculator

The DS1077 is a dual-output, 5V EconOscillator available in 8-SO or 8-µSOP packages. EconOscillators are all-silicon squarewave oscillators requiring no external clock reference or timing components for operation. They provide an alternative to crystal-based oscillators in applications where size and cost are important but absolute frequency accuracy is not. Important features include 8.2kHz to 133MHz frequency range, 1.25% frequency tolerance over temperature and voltage, 5µA power-down mode, and single or dual synchronous outputs. It may be used as a standalone oscillator or as a processor-controlled peripheral device. The DS1077 is available in four standard master frequencies with custom master frequencies available on request. A brief description of the architecture of the device and an interactive frequency calculator follows.

Block Diagram and Theory of Operation

The DS1077 5V EconOscillator is comprised of five major blocks (see Figure 1): An internal master squarewave oscillator, dual-programmable prescalers, a single divider chain, gated output drivers, and a set of EEPROM configuration registers that are accessible through a 2-wire bus.

Figure 1.

Internal Master Squarewave Oscillator

The master oscillator used in the DS1077 is a CMOS oscillator with compensation circuitry to eliminate most frequency variation over voltage and temperature.

Five standard master frequency options are available: 66.66MHz, 100MHz, 120MHz, 125MHz, and 133MHz. These frequencies are calibrated at the factory and cannot be changed by the end user. In reality, the master oscillator can be factory calibrated to any frequency between 66.666MHz and 133.333MHz and special frequencies are available in volume quantities on request. Frequencies faster than 133.333MHz are in development at the time of the publication of this document.

Dual Programmable Prescalers

The output of the master oscillator to fed directly to two independent prescalers. These can be user programmed to provide an initial divide-by of the master frequency of 1, 2, 4, or 8. The prescaler settings are stored in EEPROM memory that is accessible to the end user through a 2-wire interface. These registers can be preset before installation (for fixed-frequency applications) or can be changed by a microprocessor through the 2-wire interface during operation.

The output of the first prescaler is fed directly to a gated output buffer. The second prescaler is fed into a 1-to-1025 divider chain.

Divider Chain

The 1-to-1025 divider chain receives the prescaled clock from the second prescaler, and divides the clock signal down further. The division value can be programmed to any value between 1 and 1025. The divider chain settings are stored in EEPROM memory that is accessible through a 2-wire interface. These can be preset before installation into the application (for fixed-frequency applications) or can be interfaced to a microprocessor for dynamic frequency changes. The output of the divider is applied directly to a gated output buffer.

Gated Output Drivers

Two gated output buffers receive the clock signal from the first prescaler and the divider chain, respectively. The status of these buffers is determined by the values of EEPROM in the EEPROM block. These gates can be turned off and on either through the 2-wire interface via the EEPROM registers or the DS1077 can be figured so that the input status of the two control pins determine the status of the outputs. The control inputs may also be configured to put the DS1077 into a power-down mode. Output gate switching and power-down are configured to occur only when the clock output is low. This guarantees that only full clock pulses are generated.

EEPROM Configuration Registers

EEPROM configuration registers store all configuration information. These are accessible via a 2-wire interface and may be preprogrammed before installation for fixed-frequency applications or may be controlled by a processor in applications where dynamic frequency changes or configuration changes are necessary.

For more detailed information on the DS1077 refer to the data sheet at www.analog.com

Available Output Frequencies

With four options for the master oscillator and dual divider chains, thousands of different combinations of output frequencies are available. To ease in evaluation of the DS1077 for a possible application, an interactive frequency calculator can be found at Analog's Website (log on as an anonymous user).