A reliable analog circuit guarantees proper operation within the parametric tolerances of the active controlling IC and passive components. For a Hot Swap circuit to perform properly, the minimum and maximum values of a number of parameters must be gathered from the data sheets of all components. From these, the Hot Swap circuit’s behavior in the face of various capacitive loads should be known. This article shows how critical capacitive loads are calculated for Hot Swap circuits with foldback current limit characteristics.

Overview

For a Hot Swap circuit, as shown in Figure 1, the critical parameters are operating voltage (V_{OPER}) maximum current limit (I_{LIMIT}) timer period (T) and the maximum output voltage slew rate (S_{O}), which happens when the Hot Swap circuit starts to operate with no-load. These parameters are selected initially based on the load requirements, supply limitations and MOSFET’s drain-source on-resistance (R_{DS(ON)}) and its safe operating area (SOA).

While slewing, the MOSFET acts as a source follower so the maximum output voltage slew rate, S_{O}, is the same as the GATE pin slew rate S_{G}, and it is defined by the circuit components (gate current divided by gate to ground capacitance), and has a strong influence on the power up transient. The timer period, T, is the time allowed for the Hot Swap circuit to operate in current limit mode before a fault is generated. A successful power-up transient is one that does not generate a fault.

The problem of proper operation over the full variation of the circuit parameters is relatively simple for a circuit with constant current limit, I_{LIMIT}. The relationship of parameters of a purely capacitive load at the constant current limit for time T is:

For an R-C load it is easy to define a surplus current, which is allowed for the capacitive component of the load, and select proper load capacitance.

There are two common problems that require solutions when charging a load with a Hot Swap circuit:

- The maximum pure capacitive load for a successful power-up transient.
- The maximum capacitive load, which can be added in parallel to a resistive load, R
_{L}, for a successful power-up transient.

A linear approximation of the foldback characteristic is shown in Figure 1b. It is used in all the following considerations. The main points of this characteristic are:

- The operating voltage is V
_{OPER}. - The initial current limit value, when the output voltage 0 ≤ V
_{OUT}≤ V_{INIT}, is I_{INIT}.

This current limit value persists until the output voltage reaches V_{LIMIT}(point A), after which the current limit increases linearly, which occurs after the output voltage reaches V_{FIX}(point B). After point B the current limit is constant (I_{LIMIT} = constant). The voltage V_{FIX} is lower than V_{OPER}.

The current limit value as a function of the output voltage, shown in Figure 1b, is expressed by three separate equations for different output voltage levels:

The value of the parameters marked on Figure 1b, the timer period T value and the slew rate S_{O} are all known, with tolerance, and used in the following solutions. For some circuits, the slew rate S_{O} is fast enough that it has a negligible effect on the inrush transient, and for others, it is significant. The two loads above are solved for these two cases of slew rate.

Calculating the Maximum Pure Capacitive Load

One important parameter to know for a Hot Swap circuit is the maximum pure capacitive load that a circuit can successfully power up into without a fault.

Consider two critical capacitive loads: C_{NO_ FLT} and C_{FLT}. C_{NO_ FLT} is the maximum capacitive load with which the circuit passes the power-up transient without a fault for any possible combination of circuit parameters. C_{FLT} is the minimum capacitive load with which the power-up transient is always unsuccessful, and a fault is generated. From these, the capacitive load range can be divided into three groups. The power-up transient is successful for capacitive loads from zero to C_{NO_ FLT}. Power-up is unsuccessful for loads larger than C_{FLT}. The power-up transient is unpredictable for loads from the C_{NO_ FLT} to C_{FLT}.

The following Hot Swap circuit parameters can be initially defined with tolerance: V_{INIT}, V_{FIX}, I_{INIT}, I_{LIMIT}, T.

The function I_{LOAD}(V_{OUT}) shown in Figure 1b and equations (1–3) has three distinct operating regions for current limit. The slew rate, S_{O}, can either cause the circuit to leave a current limit mode in any of these operating regions (before the timer period T expires), or it can have no effect (i.e., S_{O} is very fast). Each of these scenarios, transients, should by analyzed for any Hot Swap circuit. Each is described below. Some transients allow finding an analytical expression for the worst-case parameters.

However, the general or universal solution can be obtained in a numerical form.

Case 1: S_{O} Never Limits Current

Suppose that natural slew rate S_{O} is fast enough to keep the operating point in current limit mode in all three portions of the function I_{LOAD}(V_{OUT}).

In the first stage of the transient, the current is I_{INIT} and the output voltage rises linearly from zero to V_{INIT} during the time t_{1}. The capacitive load C_{LOAD1} can be expressed as:

In the second stage of the transient, the current increases linearly from I_{INIT} to I_{LIMIT} according to (2) as the output voltage increases from V_{INIT} to V_{FIX}. Time t_{2} represents the duration of this stage, completed when the output voltage reaches V_{FIX}. V_{FIX} is usually set to (0.5 to 0.9) V_{OPER} (it must be lower than V_{OPER}) by proper selection of the resistive divider.

The output voltage as a function of time is:

Substituting the expression (2) in equation (5) produces:

or

which leads to the first order differential equation

with initial condition

Equation (8) describes V_{OUT}(t) from the start of stage 2, t = 0, to time t_{2}, when the current limit reaches its maximum value, I_{LIMIT}.

The solution for Equation (8) is:

The output voltage at time t_{2} is V_{FIX}

The duration of interval t_{2} is

The third equation should describe how C_{LOAD1} is charged with current I_{LIMIT} during the interval t_{3} from V_{FIX} to some intermediate-level V_{INTERIM} where the operation point leaves a current limit mode because the MOSFET transconductance drops off in the triode region. When this region is entered, successful start-up is assured, but the point at which this region begins is difficult to solve for because it involves MOSFET parameters that may not be available. This region is usually small, so it makes sense to simplify the description of this region with the assumption that C_{LOAD1} is charged from V_{FIX} to V_{OPER} with I_{LIMIT}. In this case the time:

according to (4)

Taking into account T = t_{1} + t_{2} + t_{3}, the capacitive load could be expressed

The minimum value of C_{LOAD1} from equation (15) is obtained with T_{MIN}, V_{INIT_MAX}, I_{INIT_MIN}, and V_{FIX_MAX}. The same parametric limits must be used for expression of C_{NO_FLT} that follows.

Figure 2 shows this type of start-up transient.

The output voltage slew rate range for this case falls in the range:

Case 2: S_{O} Limits Current at Point A

For the case where the slew rate limit, S_{O}, causes the operating point to leave a current limit mode exactly at point A in Figure 1, the capacitive load C_{LOAD2} can be expressed as:

C_{LOAD2} has a minimum with I_{INIT_MIN}, T_{MIN} and V_{INIT_MAX}.

It should be noted that the maximum output voltage slew rate in this case is

It is constant while the operating point resides in the current limit mode.

Figure 3 shows this transient.

Case 3: S_{O} Limits Current at Point B

To produce an analytical expression of C_{LOAD3} for the case when the operating point leaves a current limit mode at point B, assume that it happens exactly as the output voltage reaches V_{FIX}. The full duration of operation in current limit mode, T, includes two intervals t_{1} and t_{2}. According to (14) t_{1} is:

In a second part of this transient, the output voltage changes according to expression (10) and the duration of interval t_{2} is:

and from (17) and (18)

From equation (19), the minimum value of C_{LOAD3} is produced using T_{MIN}, V_{INIT_MAX}, I_{INIT_MIN}, and V_{FIX_MAX}.

The output voltage slew rate range for this case can be defined as:

Case 4: S_{O} Limits Current Between Points A and B

If the output voltage slew rate S_{O} is in the range S_{LOAD1_MIN} ≤ S_{O} ≤ S_{LOAD1_MAX}, current limiting stops before the output voltage reaches V_{FIX} (before point B), meaning that during the time t_{1_4} the output voltage slew rate is a constant (due to I_{INIT}) and during the time t_{2_4} it becomes equal to S_{O}. The following method is recommended.

The output voltage rises from zero to the V_{FIX} during the time t_{1_4}, which can be expressed from (16) as

The output voltage V_{OUT}(t_{2_4}) should be equal to the voltage on the second stage of the characteristic Figure 1 (equation 2):

Substituting I_{LOAD}(t_{2_4}) in (14) with S_{O} C_{LOAD4}, taking into an account that t_{2_4} = T − t_{1_4}, and placing the equal sign between (14) and (11) forms the following equation:

This transcendental equation (21) with unknown C_{LOAD4} can be solved with the proper calculation software (Mathcad, MATLAB, Mathematica) or LTspice.

Figure 4 demonstrates a successful power-up transient, where the current is limited for a time less than the timer period at maximum slew rate. As a result, the transient begins in current limit mode and finishes the inrush in slew rate limited operation.

Maximum Capacitive Load for Successful Power-Up Transient without the Limitation of the Output Voltage Slew Rate and a defined Resistive Load

If the passive load can be defined as a resistive load R_{L} and all Hot Swap circuit parameters (V_{OPER}, V_{FIX}, I_{INIT}, I_{LIMIT}, T) are known, then the maximum capacitive load should be found to ensure a successful power-up transient. A successful power-up transient is completed only after the current reaches I_{LIMIT}, because the slew rate is fast enough to stay in a current limit for the entire transient.

The differential equation for the first stage is:

The equation (22) solution is:

At the end of the first stage (t_{1}) the output voltage is equal to V_{INIT} and

The differential equation for the second stage is:

The first component on the left side of equation (25) is a current charging the capacitor; the second one is a resistive current.

The solution to equation (23) describes the output voltage from the beginning of this stage to the time t_{2}, when the output voltage reaches V_{FIX}.

The time interval t_{2} could be expressed as a function of C_{LOAD} from (26) as:

The differential equation for the third stage is:

With the assumption that the output voltage slew rate, S_{O}, does not affect the transient, it is possible to say that the output voltage is changing according to (28) up to V_{OPER}. The solution for equation (28) is:

At the end of this stage:

And time t_{3} equals:

Since T = t_{1} + t_{2} + t_{3}, C_{LOAD} for this case is:

Figure 5 shows measured results for this case.

Maximum Capacitive Load for Successful Power-Up Transient when Current is Limited by the Output Voltage Slew Rate and a Defined Resistive Load is Present

The value of the output voltage slew rate, S_{O}, defines how long a Hot Swap circuit should operate in the current limit mode. This event (leaving the current limit mode) can happen at any moment of the three stages of the transient. For defined points A and B, during the third stage it is possible to use equations from the previous section. For any intermediate points, it is possible to use the approach demonstrated in “Case 4” with a transcendental equation.

The transient in Figure 6 illustrates this case, when the operating point leaves the current limit mode in the first stage of current limit area.

Conclusion

The derived expressions in this article and the approach to the numerical solutions can serve as a basis for a detailed optimization of Hot Swap solutions.