AN-2533: Ultralow Power, 18-Bit, Differential PulSAR ADC Driver

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Circuit Function and Benefits

The circuit shown in Figure 1 uses the ultralow power AD7982 18-bit, 1 MSPS analog-to-digital converter (ADC) driven by the ADA4940-1, a low power fully differential amplifier. The ADR435 low noise precision 5.0 V voltage reference is used to supply the 5 V needed for the ADC. All the ICs shown in Figure 1 are available in small packages, either 3 mm × 3 mm LFCSP or 3 mm × 5 mm MSOP, which helps to reduce board cost and space. Power dissipation of the ADA4940-1 in the circuit is typically 6.25 mW. The 18-bit, 1 MSPS AD7982 ADC consumes only 7 mW at 1 MSPS. This power also scales with the throughput. The ADR435 consumes only 4.7 mW, making the total power dissipated by the system less than 18 mW.

Figure 1. High Performance 18-Bit Differential ADC Driver (Simplified Schematic: All Connections and Decoupling Not Shown).

Figure 1. High Performance 18-Bit Differential ADC Driver (Simplified Schematic: All Connections and Decoupling Not Shown).

Circuit Description

Modern high resolution SAR ADCs, such as the AD7982 18-bit, 1 MSPS PulSAR® ADC, require a differential driver for optimum performance. In such applications, the ADC driver takes either a differential or single-ended signal and performs the level shifting required to drive the input of the ADC at the right level.

Figure 1 shows the ADA4940-1 differential amplifier level shifting and driving the 18-bit AD7982 differential input successive approximation PulSAR ADC. Using four resistors, the ADA4940-1 can either buffer the signal with a gain of 1 or amplify the signal for more dynamic range. The ac and dc performances are compatible with those of the AD7982 18-bit, 1 MSPS PulSAR® ADC and other 16-bit and 18-bit members of the family, which have sampling rates of up to 2 MSPS. This circuit can also accept a single-ended input signal to generate the same fully differential output signal.

Power dissipation of the ADA4940-1 in the circuit is typically 6.25 mW. The 18-bit, 1 MSPS AD7982 ADC consumes only 7 mW at 1 MSPS. This power also scales with the throughput. The ADR435 consumes only 4.7 mW, making the total power dissipated by the system less than 18 mW.

The AD7982 operates on a single VDD supply of 2.5 V. It contains a low power, high speed, 18-bit sampling ADC and a versatile serial interface port. The reference voltage (REF) is applied externally from the ADR435 precision low dropout (0.3 V) band gap reference, and can be set independently of the supply voltage.

The ADA4940-1 operates from a 5 V single supply and offers sufficient headroom on the outputs, which swing from 0 V to 5 V with a 2.5 V common-mode and accommodate a full-scale input to the ADC. The ADA4940-1 is dc-coupled on the input and the output, and its outputs drive the inputs of the AD7982. It also allows single-ended to differential conversion if needed.

The gain is set by the ratio of the feedback resistor (R2 = R4) to the gain resistor (R1 = R3). For R1 = R2 = R3 = R4 = 1 kΩ, the single-ended input impedance is approximately 1.33 kΩ. In addition, the circuit can be used to convert either single-ended or differential inputs to a differential output. If needed, a termination resistor in parallel with the input can be used. Whether the input is a single-ended input or differential input, the input impedance of the amplifier can be calculated as shown in the MT-076 Tutorial and in the DiffAmpCalc™ Differential Amplifier Calculator.

A single-pole, 2.7 MHz, RC (22 Ω, 2.7 nF) noise filter is placed between the op amp output and the ADC input to help limit the noise at the ADC input and to reduce the effect of kickbacks coming from the capacitive DAC input of the SAR ADC.

For the tests on this circuit, the signal generator provided a 10 V p-p differential output. The VOCM input is bypassed for noise reduction and set externally with 1% resistors to maximize the output dynamic range on the 5 V reference. With an output common-mode voltage of 2.5 V, each ADA4940-1 output swings between 0 V and 5 V, opposite in phase, providing a gain of 1 and a 10 V p-p differential signal to the ADC input.

The FFT performance is shown in Figure 3 and is summarized as follows:

  • Dynamic range = 97.33 dB
  • SNR = 96.67 dBFS
  • SINAD = 96.52 dBFS
  • THD = −111.03 dBFS

Figure 2 shows the typical INL and DNL performance of the AD7982.

Figure 2. INL and DNL Plot for 20 kHz Signal, with Sampling Frequency of 1 MSPS (Min/Max INL = +1.6 LSB/−1.1 LSB and DNL = ±0.5 LSB).

Figure 2. INL and DNL Plot for 20 kHz Signal, with Sampling Frequency of 1 MSPS (Min/Max INL = +1.6 LSB/−1.1 LSB and DNL = ±0.5 LSB).

Figure 3. FFT Plot for 1 kHz Signal, 0.5 dB Below Full Scale, with Sampling Frequency of 1 MSPS.

Figure 3. FFT Plot for 1 kHz Signal, 0.5 dB Below Full Scale, with Sampling Frequency of 1 MSPS.