AN-1278: Autonomous IR Calibration on the ADF7023

Introduction

Heterodyne radios, such as the ADF7023 family of transceivers, use a mixer to downconvert received radio frequency (RF) signals to an intermediate frequency (IF). Interfering signals, called interferers, that lay on the image frequency are also mixed down to the wanted frequency. This desensitizes the receiver, resulting in blocking on the wanted channel.

In theory, an ideal transceiver, which employs an IQ receive architecture, can be configured to eliminate the image frequency mixing onto the wanted channel. This theory assumes that the gain balance and the phase orthogonality of the mixer quadrature paths are perfectly aligned. In practice, some imbalance exists due to imperfections in the mixer. The image calibration process adjusts the gain and phase of the mixer via a firmware download module, until the quadrature signals are optimally balanced, providing maximum image rejection.

This application note describes the fully autonomous image rejection (IR) calibration firmware download module for the ADF7023 transceiver IC. With minimum user input, this firmware optimizes the image rejection with a default configuration completely autonomously.

Extended options for IR calibration are available with this download, however only the basic operation is discussed in this application note.

The firmware download binary, rom_ram_7023_2_2_IRcal_dragon_filter_visu.dat, is available from Analog Devices, Inc.

Fully Autonomous Image Rejection Calibration

A downloadable IR calibration module is provided with the ADF7023 to enable optimization of image rejection performance during operation. The calibration process is fully autonomous.

The IR calibration firmware takes control of the ADF7023 receiver. The IMAGE_REJECT_CAL_CONFIG register (Address 0x319) is programmed internally by IR calibration firmware and does not need to be set by the user. The firmware applies an internally generated RF source at the image frequency to the RF input and monitors the received signal strength indication (RSSI) output. In doing so, it selects an appropriate Rx frequency for the algorithm. Note that it does not restore the original frequency values on exiting the IR calibration algorithm, thus it is up to the user to reload the desired Rx frequency values after an IR calibration.

The firmware algorithm then maximizes the image rejection performance by iteratively minimizing the quadrature gain and phase errors in the mixer filter. Note that the firmware algorithm uses the packet RAM as temporary storage during operation, thus any packet data already in packet RAM is overwritten.

After calibration, new optimum values of phase and gain are loaded back into registers IMAGE_REJECT_CAL_PHASE (Address 0x118) and IMAGE_REJECT_CAL_AMPLITUDE (Address 0x119). These calibration values are maintained in BBRAM during sleep mode and are automatically reapplied from a wake-up event, which keeps the number of calibrations required to a minimum.

An IR calibration may be executed multiple times by resending the IR CAL command CMD_IR_CAL (0xBD). The resultant values are stored in the 0x118 and 0x119 registers each time. For more repeatable results, the user should use the averaged results of multiple trials of the IR calibration as final values for 0x118 and 0x119 settings.

In general, the user must decide the timing and conditions under which to download and run the IR calibration module. Analog Devices recommends that, at a minimum, IR calibration be performed on a device at power-up initialization.

The image rejection performance is also dependent on temperature. It is, therefore, also recommended that to maintain optimum image rejection performance, a calibration should be activated whenever a temperature change of more than 10°C occurs. The ADF7023 on-chip temperature sensor can be used to determine when the temperature change exceeds this limit.

Note that in Table 1, when the IR calibration algorithm is run, these packet RAM locations take on a new function. When IR calibration is not being run, they default back to the definitions provided in the device data sheet.

Registers for IR Calibration

Table 1. IR Calibration Algorithm Configuration Registers
Address (Hex)	Register	Value	Description
0x010	IR_CAL_CTRL1	0xC0	Default IR calibration control values
0x011	IR_CAL_CTRL2	0x04	Default IR calibration control values

Table 2. Address 0x118: IMAGE_REJECT_CAL_PHASE
Bits	Name	R/W	Description
[7]	Reserved	R/W	Set to 0
[6:0]	IMAGE_REJECT_CAL_PHASE	R/W	Sets the IQ phase adjustment

Table 3. Address 0x119: IMAGE_REJECT_CAL_AMPLITUDE
Bits	Name	R/W	Description
[7]	Reserved	R/W	Set to 0
[6:0]	IMAGE_REJECT_CAL_AMPLITUDE	R/W	Sets the IQ amplitude adjustment

IR Calibration Firmware Download Procedure

The firmware download binary rom_ram_7023_2_2_IRcal_dragon_filter_visu.dat is available to download from the Analog Devices website.

The program RAM can only be written using the memory block write. SPI_MEM_WR should be set to 0x1E.

The sequence to write a firmware module to program RAM is as follows:

Ensure that the ADF7023 is in PHY_OFF.
Issue the CMD_RAM_LOAD_INIT command.
Write the module to program RAM using an SPI memory block write.
Issue the CMD_RAM_LOAD_DONE command.
Confirm that the status word indicates CMD_READY and the FW_STATE is PHY_OFF.

The firmware module is now stored on program RAM.

The program RAM is volatile memory and must be reloaded each time the transceiver wakes up from the sleep state.

Running IR Calibration

A full sequence to download and run IR calibration from a hardware reset is outlined in Figure 1.

Figure 1. Configuring for IR Calibration.

After normal initialization, the IR calibration firmware is downloaded by the sequence outlined in the IR Calibration Firmware Download Procedure.

Before entering PHY_ON, ensure that the BB_CAL bit (Bit 6) in the MODE_CONTROL register (Address 0x11A) is set to 1 to enable IF filter bandwidth (IFBW) calibration on transitioning to PHY_ON.

When in PHY_ON, program the IR calibration configuration parameters 0xC0 and 0x04 to packet RAM locations 0x010 and 0x011 as defined in Table 1.

IR calibration can now be executed by issuing CMD_IR_CAL.

It is important that the host wait for IR calibration to complete before reading the updated IMAGE_REJECT_ CAL_PHASE and IMAGE_REJECT_CAL_AMPLITUDE registers. IR_CAL status cannot be confirmed by checking the status word. Confirmation of completion of IR_CAL can be done by either of the methods recommended below.

The firmware state returns to PHY_ON after IR_CAL operation completes and the CMD_READY bit is set. This can be used to indicate that IR calibration has completed.

Alternatively, the internal Calibration Status register (0x33A),Bit 0, can be checked. Note that this function is not detailed in the data sheet because it is only relevant when IR calibration firmware is running. Details of the calibration status register are shown in Table 4. Bit 0 indicates if the IR calibration is complete or not.

Table 4. 0x33A: IR Calibration Status
Bits	Name	R/W	Description
[7:1]	Reserved	R	Reserved
[0]	MCR_IMAGE_REJECT_CALIBRATION_STATUS	R/W	0: IR calibration not complete 1: IR calibration complete

Averaging of IR Calibration Values

More repeatable results can be obtained by averaging. This requires control from a host processor. An example is shown in the flowchart in Figure 2.

Figure 2. Example Host Program Flow for Averaged IR Calibration Values.

The host has an iteration counter, ITERATION_CNT. It issues a CMD_IR_CAL command for this number of iterations, waits for the calibration to complete, and then reads back and averages the results. The averaged values are then programmed back into IMAGE_REJECT_CAL_PHASE (Address 0x118) and IMAGE_REJECT_CAL_AMPLITUDE (Address 0x119) at the end of the loop.

Results of Calibration

The results of each IR calibration are stored in the BBRAM registers IMAGE_REJECT_CAL_PHASE (Address 0x118) and IMAGE_REJECT_CAL_AMPLITUDE (Address 0x119), overwriting any previous values in those registers.

If the host is maintaining an average, as in the example in Figure 2, then once the averaging is complete, the host writes back the averaged values to Address 0x118 and Address 0x119.

These calibration values are maintained in BBRAM during sleep mode and are automatically reapplied upon issuing CMD_CONFIG_DEV (0xBB).

The typical improvement in image attenuation post calibration is shown in Figure 3.

Figure 3. Image Attenuation with Calibrated and Uncalibrated Images, 915 MHz, IF Filter Bandwidth = 100 kHz.

Advanced Operation

This application note explains the basic operation of the IR calibration firmware module.

More advanced techniques, such as seeding the algorithm for faster calibration times or using an external reference sources for a more robust calibration code, are not described here. If more advanced options are required, contact Analog Devices.