ADALM2000 Activity: CMOS Amplifier Stages

Objective

The goal of this activity is to explore a high gain inverting amplifier constructed from complementary MOS devices (CMOS).

Materials

• ADALM2000 Active Learning Module
• Solderless breadboard
• Jumper wires
• Three 100 kΩ resistors
• One 10 kΩ resistor
• One 4.7 kΩ resistor
• Two 22 μF capacitors
• Two 1 μF capacitors
• One 10 pF capacitor
• One CD4096A, CD4069UB, CD74HCU04, or CD4007

Background

A CMOS inverter can also be viewed as a high gain amplifier. It consists of one PMOS device, M1, and one NMOS device, M2. Generally, the CMOS fabrication process is designed such that the threshold voltage, V_TH, of the NMOS and PMOS devices are roughly equal—that is, complementary. The designer of the inverter then adjusts the width-to-length ratio, W/L, of the NMOS and PMOS devices such that their respective transconductance is also equal.

Directions

First build the simple example shown in Figure 2 to test the input-to-output transfer function of the simple CMOS amplifier. Connect Vp (5 V) power to V_DD (pin 14) and ground to GND (pin 7). Connect the output of the waveform generator to one of the inverter inputs (pin 1) along with Scope Input 1+, and connect the inverter output (pin 2) to Scope Input 2+. If you are using the CD4069A(UB) you can connect pin 7, V_SS, to the negative board supply, Vn, rather than ground because the CD4069A(UB) supports power supply voltages greater than 5 V.

Hardware Setup

Breadboard connections of the CMOS inverter amplifier circuit are presented in Figure 4.

Configure the waveform generator for a 1 kHz triangle wave with 4 V amplitude peak-to-peak and 2.5 V offset. Both scope channels should be set to 1 V/div. If you are using the CD4069A on the plus and minus power supplies, you will need to use a larger 8 V amplitude peak-to-peak and 0 V offset.

Procedure

Measure the slope of the output and calculate the DC gain of the amplifier as the ratio of the change in the output voltage to the change in input voltage at the center of the output swing (that is, around 2.5 V). Remember this should be a negative number because the amplifier inverts.

A Scopy oscilloscope plot example is presented in Figure 5.

Adding Negative Feedback

Use your solderless breadboard to construct the amplifier circuit shown in Figure 6.

Hardware Setup

Breadboard connections of the single-stage amplifier are presented in Figure 7.

Configure the waveform generator for a 1 kHz sine wave with 2 V amplitude peak-to-peak and 0 V offset.

Procedure

Apply a sinusoidal signal of 2 V amplitude peak-to-peak with 0 V offset to the input, and measure the gain of the entire system from 10 kHz to 100 kHz. Use the network (Bode) analyzer to plot gain and phase vs. frequency for the entire system.

An LTspice^® plot example is presented in Figure 8.

Adding More Stages for Higher Gain

Use your solderless breadboard to construct the amplifier circuit shown in Figure 9.

Hardware Setup

Breadboard connections of the 3-stage amplifier are presented in Figure 10.

Configure the waveform generator for a 1 kHz sine wave with 2 V amplitude peak-to-peak and 0 V offset.

Procedure

Apply a sinusoidal signal of 2 V amplitude peak-to-peak with 0 V offset to the input, and measure the gain of the entire system from 10 kHz to 100 kHz. Use the network (Bode) analyzer to plot gain and phase vs. frequency for the entire system.

An LTspice plot example is presented in Figure 11.

Additional Circuits

Chopper Amplifier

The CD4069A(UB) unbuffered hex CMOS inverter and a CD4066 quad analog switch are used as elements of a chopper amplifier. Referring to Figure 12, the various functions of this circuit can be determined. The two inverters on the bottom left of Figure 12 create a square wave and its complement to drive the switch controls of the CD4066. These square waves drive the switches, with switches A and B functioning as a single-pole, double-throw switch on the input, and switches C and D performing the same function on the output. The other inverter in the middle of Figure 12 is used as an AC-coupled amplifier similar to what we just looked at in Figure 6.

In operation, the input signal is modulated by the input switches, amplified by the AC amplifier, and then demodulated by the output switches. The 20 kΩ, 560 pF low-pass filter minimizes the high frequency ripple in the output.

Question:

• For the circuit in Figure 6, what is the gain from the input source, W1, to the output seen at the inverter output?
• Which components determine the gain of the circuit in Figure 6? You can find the answers at the StudentZone blog.

Authors

Antoniu Miclaus

Antoniu Miclaus is a software engineer at Analog Devices, where he works on embedded software for Linux and no-OS drivers, as well as ADI academic programs, QA automation, and process management. He started working at ADI in February 2017 in Cluj-Napoca, Romania. He holds an M.Sc. degree in software engineering from the Babes-Bolyai University and a B.Eng. degree in electronics and telecommunications from the Technical University of Cluj-Napoca.

Doug Mercer

Doug Mercer received his B.S.E.E. degree from Rensselaer Polytechnic Institute (RPI) in 1977. Since joining Analog Devices in 1977, he has contributed directly or indirectly to more than 30 data converter products and holds 13 patents. He was appointed to the position of ADI Fellow in 1995. In 2009, he transitioned from full-time work and has continued consulting at ADI as a fellow emeritus contributing to the Active Learning Program. In 2016, he was named engineer in residence within the ECSE department at RPI.