Overview

Features and Benefits

  • Pairs with Any GMSL Serializer
  • 2.5Gbps Payload-Rate AC-Coupled Serial Link
  • Scrambled 8b/10b Line Coding
  • Supports WXGA (1280 x 800) with 24-Bit Color
  • 8.33MHz to 104MHz (3-Channel LVDS) or 6.25MHz to 78MHz (4-Channel LVDS) Output Clock
  • 4-Bit to 32-Bit Word Length, 8kHz to 192kHz I²S Audio Channel Supports High-Definition Audio
  • Embedded Half-/Full-Duplex Bidirectional Control Channel (100kbps to 1Mbps)
  • Two 3-Level Inputs Support 9 Device Addresses
  • Interrupt Supports Touch-Screen Functions for Display Panels
  • I²C Master for Peripherals
  • Equalizer for Serial Link Input
  • Programmable Spread Spectrum on the LVDS and Control Outputs for Reduced EMI
  • Serial-Data Clock Recovery Eliminates an External Clock
  • Automatic Data-Rate Detection Allows On-the-Fly Data-Rate Change
  • Built-In PRBS Generator for BER Testing of the Serial Link
  • ISO 10605 and IEC 61000-4-2 ESD Protection
  • -40°C to +105°C Operating Temperature Range
  • 1.8V to 3.3V I/O and 3.3V Core Supplies
  • Patent Pending

Product Details

The MAX9268 deserializer utilizes Maxim's gigabit multimedia serial link (GMSL) technology. The MAX9268 deserializer features an LVDS system interface for reduced pin count and a smaller package, and pairs with any GMSL serializer to form a complete digital serial link for joint transmission of high-speed video, audio, and bidirectional control data.

The MAX9268 allows a maximum serial payload data rate of 2.5Gbps for a 15m shielded twisted-pair (STP) cable. The deserializer operates up to a maximum output clock rate of 104MHz (3-channel LVDS) or 78MHz (4-channel LVDS). This serial link supports display panels from QVGA (320 x 240) to WXGA (1280 x 800) and higher with 24-bit color.

The 3-channel mode outputs an LVDS clock, three lanes of LVDS data (21 bits), UART control signals, and one I²S audio channel consisting of three signals. The 4-channel mode outputs an LVDS clock, four lanes of LVDS data (28 bits), UART control signals, an I²S audio channel, and auxiliary control outputs. The three audio outputs form a standard I²S interface, supporting sample rates from 8kHz to 192kHz and audio word lengths of 4 to 32 bits. The embedded control channel forms a full-duplex, differential, 100kbps to 1Mbps UART link between the serializer and deserializer. An electronic control unit (ECU), or microcontroller (µC), can be located on the serializer side of the link (typical for video display), on the MAX9268 side of the link (typical for image sensing), or on both sides. In addition, the control channel enables ECU/µC control of peripherals on the remote side, such as backlight control, grayscale Gamma correction, camera module, and touch screen. Base-mode communication with peripherals uses either I²C or the GMSL UART format. In addition, the MAX9268 features a bypass mode that enables full-duplex communication using custom UART formats.

The GMSL serializer driver preemphasis, along with the MAX9268 channel equalizer, extends the link length and enhances the link reliability. Spread spectrum is available to reduce EMI on the LVDS and control outputs of the MAX9268. The serial line inputs comply with ISO 10605 and IEC 61000-4-2 ESD protection standards.

The core supply for the MAX9268 is 3.3V. The I/O supply ranges from 1.8V to 3.3V. The MAX9268 is available in a 48-pin TQFP package (7mm x 7mm) with an exposed pad, and is specified over the -40°C to +105°C automotive temperature range.

Applications

  • High-Resolution Automotive Navigation
  • Megapixel Camera Systems
  • Rear-Seat Infotainment

Product Lifecycle icon-recommended Production

At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.

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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.