MAX4895E
PRODUCTIONVGA Port Protector
Integrates Both Level-Translating Buffers and ESD Port Protection for the R, G, and B Terminals
- Part Models
- 2
- 1ku List Price
- Starting From $1.81
Overview
- ESD Protection on H1, V1, SDA1, SCL1, R, G, and B
- ±15kV—Human Body Model
- ±8kV—IEC 61000-4-2, Contact Discharge
- Low Quiescent Current, IQ ≤ 5µA (max)
- Low 3pF (max) Capacitance (R, G, B Ports)
- DDC Level-Shifting Protection and Isolation
- Horizontal Sync, Vertical Sync Level Shifting/Buffering
- Input Compatible with VL
- Output Full +5.0V TTL Compatible (per VESA)
- ±10mA Drive on Each H, V Terminal
- Space-Saving, Lead-Free, 16-Pin (3mm x 3mm) TQFN Package
The MAX4895E integrates level-translating buffers and features R, G, B port protection for VGA signals.
The MAX4895E has H, V (horizontal, vertical) translating buffers that take low-level CMOS inputs from the graphics outputs to meet full +5.0V, TTL-compatible outputs. Each output can drive ±10mA and meet the VESA® specification. In addition, the device takes the +5.0V, direct digital control (DDC) signals and translates them to the lower level required by the graphics device. This level is set by the user by connecting VL to the graphics output supply. The R, G, B terminals protect the graphics output pins against electrostatic discharge (ESD) events. All seven outputs have high-level ESD protection.
The MAX4895E is specified over the extended -40°C to +85°C temperature range, and is available in a 16-pin, 3mm x 3mm TQFN package.
Applications
- Desktops
- Graphics Cards
- Notebook Computers
- Servers
Documentation
Data Sheet 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| MAX4895EETE+ | Thin Quad Flatpack, No Leads | ||
| MAX4895EETE+T | Thin Quad Flatpack, No Leads |
| Part Models | Product Lifecycle | PCN |
|---|---|---|
|
Aug 2, 2025 - 2505 PIN/ERRATA |
||
| MAX4895EETE+ | PRODUCTION | |
|
Mar 9, 2023 - 2276A WAFER FAB |
||
| MAX4895EETE+ | PRODUCTION | |
| MAX4895EETE+T | PRODUCTION | |
|
Sep 18, 2020 - 2054 ASSEMBLY |
||
| MAX4895EETE+ | PRODUCTION | |
| MAX4895EETE+T | PRODUCTION | |
|
Jun 20, 2016 - 1612 ASSEMBLY |
||
| MAX4895EETE+ | PRODUCTION | |
| MAX4895EETE+T | PRODUCTION | |
This is the most up-to-date revision of the Data Sheet.