MAX3867

+3.3V, 2.5Gbps SDH/SONET Laser Driver with Automatic Power Control

High-Performance Laser Driver

Data Sheet (Rev. 0a)
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Overview

  • Single +3.3V or +5V Power Supply
  • 62mA Supply Current at +3.3V
  • Programmable Modulation Current from 5mA to 60mA
  • Programmable Bias Current from 1mA to 100mA
  • Rise/Fall Time < 90ps
  • Automatic Average Power Control with Failure Monitor
  • Complies with ANSI, ITU, and Bellcore SDH/SONET Specifications
  • Enable Control

The MAX3867 is a complete, single +3.3V laser driver for SDH/SONET applications up to 2.5Gbps. The device accepts differential PECL data and clock inputs and provides bias and modulation currents for driving a laser. The synchronizing input latch can be bypassed if a clock signal is not available.

An automatic power control (APC) feedback loop is incorporated to maintain a constant average optical power over temperature and lifetime. The wide modulation current range of 5mA to 60mA and bias current of 1mA to 100mA are easy to program, making this product ideal for use in various SDH/SONET applications.

The MAX3867 also provides enable control, a programmable slow-start circuit to set the laser turn-on delay, and a failure-monitor output to indicate when the APC loop is unable to maintain the average optical power. The MAX3867 is available in a small 48-pin TQFP package as well as dice.

Applications

  • 2.5Gbps Optical Transmitters
  • Add/Drop Multiplexers
  • Digital Cross-Connects
  • Section Regenerators
  • SONET/SDH Transmission Systems
MAX3867
+3.3V, 2.5Gbps SDH/SONET Laser Driver with Automatic Power Control
MAX3867: Typical Operating Circuit
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Documentation

Data Sheet 1

Reliability Data 1

Application Note 2

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Hardware Ecosystem

Parts Product Life Cycle Description
Interface Transceivers & Isolators 1
MAX3869
NOT RECOMMENDED FOR NEW DESIGNS +3.3V, 2.5Gbps SDH/SONET Laser Driver with Current Monitors and APC
Serializer/Deserializer (SerDes) & Gigabit Multimedia Serial Link (GMSL) 1
MAX3890
+3.3V, 2.5Gbps, SDH/SONET 16:1 Serializer with Clock Synthesis and LVDS Inputs
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