Features and Benefits
- IEEE 802.3
- 10/100Mbps, Half / Full Duplex
- Full Duplex Flow Control
- Half Duplex Back Pressure Flow Control
- Broadcast / Multicast Storm Prevention
- IEEE 1588 V2
- Hardware Assist for Ordinary Clock
- End-to-end Transparent Clock
- DLR Beacons
- Capability to processes beacons from 100 ms down to 100 μs
- Provides auto-generation of beacon frames for supervisor functions
- Cut through forwarding
- Cut through forwarding minimizes latency for High Performance Control
- Applications such as CIP Motion
- IP Differentiated Services Code Point (DSCP) based Quality of Service (QoS)
- 4 Prioritized Queues per Port
- Incoming Filtering on Unicast / Multicast Traffic
- 256-entry Dynamic Unicast MAC Learning and Filtering for 2 External Ports
- 128 buffers of 128 bytes for each port
- Statistics Counters for 2 External Ports
- Supported Network topologies:
- Hierarchical Star with either one of the external ports
- Daisy Chain / Hybrid Daisy Chain Hierarchical Star
- DLR Media Redundancy with Hardware Support for a Single Fault Tolerant Ring Protocol
- Software for Switch & DLR Protocol Management
- Full Industrial Temperature Range -40 to +85C
- 128 pin Plastic Low Profile QFT (LQFP), RoHS Compliant
- 128 Ball Grid Array ( 10x10mm BGA), RoHS Compliant
The fido2100 is part of the Innovasic fido® family of real-time communication products. The fido2100 is a managed, 3-port Ethernet switch with support for IEEE-1588 and Device Level Ring (DLR) protocol. The fido2100 enhances the capabilities of Innovasic’s line of Industrial Ethernet products by providing an infrastructure element with low latency, time synchronization and redundancy for any embedded Industrial Ethernet solution.
The fido2100 is an IEEE 802.3 standard compliant, Layer 2 switch that is compatible with the IEEE 802.1D standard. It has three ports: two are external ports that function as physical ports of a product and one is an internal port that connects to the host CPU. Each of the three ports has an IEEE 802.3 compliant MAC and the ports are interconnected with each other through full wire speed, non-blocking switching logic. Figure 1 illustrates the top-level blocks of the fido2100 architecture.
The pass-through of traffic is handled swiftly by using cut through forwarding to pass traffic to the other external port. This is accomplished without host CPU intervention, which keeps throughput time host interaction to a minimum and keeps pass through delay to a minimum.
The fido2100 also has the ability to operate in a DLR configuration, which provides media redundancy amongst its members. Host CPU source code is available to provide the ability for the device to be a DLR participant or a DLR supervisor using the DLR support functions. The fido2100 will default to linear topology operation, and when inserted into a ring, will automatically change to DLR operation as a DLR participant.
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Documentation & Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.
|Part Number||Material Declaration||Reliability Data||Pin/Package Drawing||CAD Symbols, Footprints & 3D Models|
|FIDO2100BGA128IR0||Material Declaration||Reliability Data||BALL GRID ARRAY|
|FIDO2100PLQ128IR0||Material Declaration||Reliability Data||LQFP 1.4 MM|
|Wafer Fabrication Data|
Sample & Buy
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