DS28DG02

2Kb SPI EEPROM with PIO, RTC, Reset, Battery Monitor, and Watchdog

Integrates Key Mixed-Signal and EEPROM-Array Functions Typically Required in a Wide Variety of Systems

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Overview

2Kb (256 x 8) EEPROM Organized in Four 64-Byte Blocks
Single Byte and Up to 16-Byte EEPROM Write Sequences
EEPROM Write-Protect Control Pin Protects 1, 2, or All 4 Blocks
Endurance 200k Cycles per Page at +25°C; 10ms (max) EEPROM Write Cycle
SPI Serial Interface Supporting Modes (0,0) and (1,1) at Up to 2MHz Clock Frequency
12 PIO Lines with LED Drive Capability
Each PIO is Configured to Input or Output, Open-Drain/Push-Pull on Startup by Stored Value
All PIOs are Reconfigurable After Startup
RTC/Calendar/Alarm with BCD Format and Leap-Year Compensation
RTC Controlled Through 32.768kHz, 12.5pF Crystal or External TCXO
CPU Reset Through Fast-Response Precision V_CC Monitor with Hysteresis or Pushbutton
Battery Monitor 2.5V, 2.25V, 2.0V, 1.75V, -5%
Watchdog Timer 1.6s, 0.8s, 0.4s, 0.2s (typ)
Unique Factory-Programmed 64-Bit Device Registration Number
Operating Range: 2.2V to 5.25V, -40°C to +85°C
±4kV IEC 1000-4-2 ESD Protection Level (Except Crystal Pins)
Available in 28-Lead, 4.4mm TSSOP or 36-Lead 6mm × 6mm QFN Package

The DS28DG02 combines 2Kb (256 x 8) EEPROM with 12 PIO lines, a real-time clock (RTC) and calendar with alarm function, a CPU reset monitor, a battery monitor, and a watchdog. Communication with the device is accomplished with an industry-standard SPI™ interface. The user EEPROM is organized as four blocks of 64 bytes each with single-byte and up to 16-byte page write capability. Additional registers provide access to PIOs and to setup functions. Individual PIO lines can be configured as inputs or outputs. The power-on state of PIOs programmed as outputs is stored in nonvolatile (NV) memory. All PIOs may be reconfigured by the user through the serial interface. The RTC/calendar operates in the 12/24-hour format and automatically corrects for leap years. Battery monitor threshold and watchdog timeout are user-programmable through NV registers. The reset monitor generates a reset to the CPU if the voltage at the V_CC pin falls below the factory-set limit. The reset output includes a debounce circuit for manual pushbutton reset.

Applications