DS2187

Receive Line Interface

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Overview

  • Line interface for T1 (1.544MHz) and CEPT (2.048MHz) primary rate networks
  • Extracts clock and data from twisted pair or coax
  • Meets requirements of PUB 43801, TR 62411, and applicable CCITT G.823
  • Precision on-chip PLL eliminates external crystal or LC tank—no tuning required
  • Decodes AMI, B8ZS, and HDB3 coded signals
  • Designed for short-loop applications such as terminal equipment to DSX-1
  • Reports alarm and error events
  • Compatible with the DS2180A T1/ISDN primary rate and DS2181A CEPT
  • Transceivers and DS2141A T1 and DS2143 E1 controllers
  • Companion to the DS2186 T1/CEPT
  • Transmit line interface and DS2188
  • T1/CEPT jitter attenuator
  • Single 5V supply; low-power CMOS technology
  • The DS2187 T1/CEPT receive line interface chip interfaces user equipment to North American (T1 1.544MHz) and European (CEPT 2.048MHz) primary rate communication networks. The device extracts clock and data from twisted pair or coax transmission media and eliminates expensive discrete components and/or manual tuning required in existing T1 and CEPT line termination electronics.

    Application areas include DACS, CSU, CPE, channel banks, and PABX-to-computer interfaces such as DMI and CPI.

    DS2187
    Receive Line Interface
    DS2187: Block Diagram
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    Documentation

    Data Sheet 1

    Reliability Data 1

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