Part Details
  • Single-chip DS1 rate transceiver
  • Supports common framing standards
    • 12 frames/superframe "193S"
    • 24 frames/superframe "193E"
  • Three zero suppression modes:
    • B7 stuffing
    • B8ZS
    • Transparent
  • Simple serial interface used for configuration, control and status monitoring in processor mode
  • Hardware mode requires no host processor; intended for standalone applications
  • Selectable 0, 2, 4, 16-state robbed-bit signaling modes
  • Allows mix of clear and non-clear DS0 channels on same DS1 link
  • Alarm generation and detection
  • Receive error detection and counting for transmission performance monitoring
  • 5V supply, low-power CMOS technology
  • Surface-mount package available, designated DS2180AQ
  • Industrial temperature range of -40°C to +85°C available, designated DS2180AN or DS2180AQN
  • Compatible to DS2186 transmit line interface, DS2187 receive line interface, DS2188 jitter attenuator, DS2175 T1/CEPT elastic store, DS2290 T1 isolation stik, and DS2291 T1 long loop stik
Additional Details
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The DS2180A is a monolithic CMOS device designed to implement primary rate (1.544MHz) T-carrier transmission systems. The 193S framing mode is intended to support existing Ft/Fs applications (12 frames/superframe). The 193E framing mode supports the extended superframe format (24 frames/superframe). Clear-channel capability is provided by selection of appropriate zero suppression and signaling modes.

Several functional blocks exist in the transceiver. The transmit framer/formatter generates appropriate framing bits, inserts robbed bit signaling, supervises zero suppression, generates alarms, and provides output clocks useful for data conditioning and decoding. The receive synchronizer establishes frame and multiframe boundaries by identifying frame signaling bits, extracts signaling data, reports alarms and transmission errors, and provides output clocks useful for data conditioning and decoding.

The control block is shared between transmit and receive sides. This block determines the frame, zero suppression, alarm and signaling formats. User access to the control block is by one of two modes. In the processor mode, pins 14 through 18 are a microprocessor/microcontroller-compatible serial port that can be used for device configuration, control, and status monitoring.

In the hardware mode, no off-board processor is required. Pins 14 through 18 are reconfigured into hardwired select pins. Features such as selection clear DS0 channels, insertion of idle code and alteration of sync algorithm are unavailable in the hardware mode.

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