DS2176
T1 Receive Buffer
Part Details
- Synchronizes loop-timed and system-timed T1 data streams
- Two-frame buffer depth; slips occur on frame boundaries
- Output indicates when slip occurs
- Buffer can be recentered externally
- Ideal for 1.544 to 2.048MHz rate conversion
- Interfaces to parallel or serial backplanes
- Extracts and buffers robbed-bit signaling
- Inhibits signaling updates during alarm or slip conditions
- Integration feature "debounces" signaling
- Slip-compensated output indicates when signaling updates occur
- Compatible with DS2180A T1 transceiver
- Surface mount package available, designated DS2176Q
- Industrial temperature range of -40°C to +85°C available, designated DS2176N
The DS2176 is a low-power CMOS device specifically designed for synchronizing receive-side loop-timed T-carrier data streams with system-side timing. The device has several flexible operating modes that simplify interfacing incoming data to parallel and serial TDM backplanes. The device extracts, buffers and integrates ABCD signaling; signaling updates are prohibited during alarm or slip conditions. The buffer replaces extensive hardware in existing applications with one "skinny" 24-pin package. Application areas include digital trunks, drop and insert equipment, transcoders, digital cross-connects (DAC), private network equipment, and PABX-to-computer interfaces such as DMI and CPI.
Documentation
Data Sheet 1
Reliability Data 1
This is the most up-to-date revision of the Data Sheet.
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