The device accepts low voltage TTL/CMOS logic signals and converts them to a differential current output of typically ±3.5 mA for driving a transmission medium such as a twisted pair cable. The transmitted signal develops a differential voltage of typi-cally ±350 mV across a termination resistor at the receiving end. This voltage is converted back to a TTL/CMOS logic level by an LVDS receiver.

The ADN4665 also offers active high and active low enable/ disable inputs (EN and overbar: EN). These inputs control all four drivers and turn off the current outputs in the disabled state to reduce the quiescent power consumption to typically 10 mW. The ADN4665 offers a new solution to high speed, point-to-point data transmission and offers a low power alternative to emitter-coupled logic (ECL) or positive emitter-coupled logic (PECL).