ADN2913
Continuous Rate 6.5 Mbps to 8.5 Gbps Clock and Data Recovery IC with Integrated Limiting Amp/EQ
Show More
Not the part you were looking for?
Ask a Question
Submit your question below and we will return the best answer from ADI’s knowledge database:
Search
Other places you can find help
Support
Analog Devices Support Portal is a one-stop shop to answer all your ADI questions.
Visit the ADI Support Page
Features
- Serial data input: 6.5 Mbps to 8.5 Gbps
- No reference clock required
- Exceeds SONET/SDH requirements for jitter transfer/ generation/tolerance
- Quantizer sensitivity: 6.3 mV typical (limiting amplifier mode)
- Optional limiting amplifier, equalizer (EQ), and 0 dB EQ inputs
- Programmable jitter transfer bandwidth to support G.8251 OTN
- Programmable slice level
- Sample phase adjust (5.65 Gbps or greater)
- Output polarity invert
- Programmable LOS threshold via I2C
- I2C interface to access optional features
- Loss of signal (LOS) alarm (limiting amplifier mode only)
- Loss of lock (LOL) indicator
- PRBS generator/detector
- Application aware power
- 352 mW at 8.5 Gbps, equalizer mode, no clock output
- 380 mW at 6.144 Gbps, limiting amplifier mode, no clock output
- 340 mW at 622 Mbps, 0 dB EQ mode, no clock output
- Power supplies: 1.2 V, flexible 1.8 V to 3.3 V, and 3.3 V
- 4 mm × 4 mm, 24-lead LFCSP
.svg?rev=fd385c90e2cf4716ae9a8c8d20e6b8e3&la=en&h=24&w=24&hash=A302DF48F94BAAA11877AF223F27157A){kind=icon}
The ADN2913 provides the receiver functions of quantization, signal level detection, and clock and data recovery for continuous data rates from 6.5 Mbps to 8.5 Gbps. The ADN2913 automatically locks to all data rates without the need for an external reference clock or programming. ADN2913 jitter performance exceeds all jitter specifications required by SONET/SDH, including jitter transfer, jitter generation, and jitter tolerance.
The ADN2913 provides manual or automatic slice adjust and manual sample phase adjusts. Additionally, the user can select a limiting amplifier, equalizer, or 0 dB EQ at the input. The equalizer is adaptive or it can be manually set.
The receiver front-end loss of signal (LOS) detector circuit indicates when the input signal level falls below a user-programmable threshold. The LOS detection circuit has hysteresis to prevent chatter at the LOS output. In addition, the input signal strength can be read through the I2C registers.
The ADN2913 also supports pseudorandom binary sequence (PRBS) generation, bit error detection, and input data rate readback features.
The ADN2913 is available in a compact 4 mm × 4 mm, 24-lead lead frame chip scale package (LFCSP). All ADN2913 specifications are defined over the ambient temperature range of −40°C to +85°C, unless otherwise noted.
Applications
- SONET/SDH OC-1/OC-3/OC-12/OC-48 and all associated FEC rates
- 1GE, 1GFC, 2GFC, 4GFC, 8GFC, CPRI OS/L.6 up to OS/L.60
- Any rate regenerators/repeaters
Ask a Question
Submit your question below and we will return the best answer from ADI’s knowledge database:
Search
Other places you can find help
Support
Analog Devices Support Portal is a one-stop shop to answer all your ADI questions.
Visit the ADI Support Page
{{modalTitle}}
{{modalDescription}}
{{dropdownTitle}}
- {{defaultSelectedText}} {{#each projectNames}}
- {{name}} {{/each}} {{#if newProjectText}}
-
{{newProjectText}}
{{/if}}
{{newProjectTitle}}
{{projectNameErrorText}}
ADN2913
Documentation
Filters
1 Applied
-
All
-
Data Sheet
-
User Guide
-
All
-
English
Data Sheet
1
User Guide
1
Documentation
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| ADN2913ACPZ |
24-Lead LFCSP (4mm x 4mm x 0.75mm w/ EP)
|
|
|
| ADN2913ACPZ-RL7 |
24-Lead LFCSP (4mm x 4mm x 0.75mm w/ EP)
|
|
- ADN2913ACPZ
- Pin/Package Drawing
-
24-Lead LFCSP (4mm x 4mm x 0.75mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
- ADN2913ACPZ-RL7
- Pin/Package Drawing
-
24-Lead LFCSP (4mm x 4mm x 0.75mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
Filter by Model
Part Models
Product Lifecycle
PCN
May 21, 2021
- 21_0074
Discontinuance of ADN2913
ADN2913ACPZ
Obsolete
ADN2913ACPZ-RL7
Obsolete
Filter by Model
Part Models
Product Lifecycle
PCN
May 21, 2021
- 21_0074
Discontinuance of ADN2913
Software & Part Ecosystem
Evaluation Kits 1
EVAL-ADN29XX
ADN2905/ADN2913/ADN2915/ADN2917 Evaluation Board
Product Detail
The ADN2905, ADN2913, ADN2915, and ADN2917 provide the receiver functions of quantization, signal level detect, and clock/data recovery for a continuous signal data rate range from 6.5 Mbps to 11.3 Gbps. The ADN29xx automatically lock to such a data signal without referring to an external clock or extra programming. All SONET/SDH jitter requirements are exceeded, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for the –40°C to +85°C temperature range, unless otherwise noted.
For the best input signal detection, the ADN29xx input circuitry can be configured as a limiting amplifier, an equalizer, or a 0 dB equalizer. Additionally, the ADN29xx provide manual control of sampling phase and slice level adjust to optimize the incoming data eye detection.
The loss of signal (LOS) is available in limiting amplifier input mode only. The asserted LOS indicates that the input signal level has fallen below a preset threshold. The LOS detect circuit provides a typical 6.0 dB hysteresis to prevent LOS output chatter.
The asserted loss of lock (LOL) indicates when incoming signal rate shifts more than 1000 ppm away from the CDR VCO frequency.
The ADN29xx are available in a compact 4 mm × 4 mm, 24-lead chip scale package (LFCSP).
Full specifications on the ADN2905/ADN2913/ADN2915/ADN2917 are available in the product data sheet, which should be consulted in conjunction with this user guide when working with the evaluation board.
The ADN2905, ADN2913, ADN2915, and ADN2917 are pin-to-pin compatible devices and share the same evaluation board. Each EVALZ-ADN29xx evaluation board is populated by a different DUT: ADN2905 on the EVALZ-ADN2905, ADN2913 on the EVALZ-ADN2913, ADN2915 on the EVALZ-ADN2915, and ADN2917 on the EVALZ-ADN2917.
Resources
