ADN2812
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp
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Overview
Features and Benefits
- Serial data input: 12.3 Mb/s to 2.7 Gb/s
- Exceeds SONET requirements for jitter transfer/ generation/tolerance
- Quantizer sensitivity: 6 mV typical
- Adjustable slice level: ±100 mV
- Patented clock recovery architecture
- Loss of signal (LOS) detect range: 3 mV to 15 mV
- Independent slice level adjust and LOS detector
- No reference clock required
- Loss of lock indicator
- I2C interface to access optional features
- Single-supply operation: 3.3 V
- Low power: 750 mW typical
Product Details
The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for −40°C to +85°C ambient temperature, unless otherwise noted.This device, together with a PIN diode and a TIA preamplifier, can implement a highly integrated, low cost, low power fiber optic receiver.
The receiver front end, loss of signal (LOS) detector circuit indicates when the input signal level has fallen below a user-adjustable threshold. The LOS detect circuit has hysteresis to prevent chatter at the output.
The ADN2812 is available in a compact 5 mm × 5 mm 32-lead lead frame chip scale package (LFCSP).
Applications
- SONET OC-1/OC-3/OC-12/OC-48 and all associated FEC rates
- Fibre Channel, 2× Fibre Channel, GbE, HDTV
- WDM transponders
- Regenerators/repeaters
- Test equipment
- Broadband cross-connects and routers
Product Categories
Product Lifecycle
Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (1)
Documentation & Resources
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AN-746: Supporting FDDI with the ADN2812 (Rev. 0)10/14/2005PDF76 kB
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AN-757: Acquisition Times of the ADN2812 (Rev. 0)11/30/2004PDF78 kB
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AN-657: ADN2812 Evaluation Board (Rev. A)10/3/2003PDF293 kB
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AN-632: Provisionary Data Rates Using the AD9951 DDS as an Agile Reference Clock for the ADN2812 Continuous-Rate CDR (Rev. 0)9/25/2003PDF138 kB
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FAQs7/26/2017
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
PCN-PDN Information
Support & Discussions
ADN2812 Discussions
Sample & Buy
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The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.
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Evaluation Boards
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.