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Overview
Features and Benefits
- EIA RS-485/RS-422-compliant
- Data Rates up to 250 kbps
- Slew-rate Limited for Low EMI
- 100 nA Supply Current in Shutdown Mode
- Low Power Consumption (120 µA)
- Up to 32 Transceivers on one Bus
- Outputs High-z When Disabled or Powered Off
- –7 V to +12 V Bus Common-mode Range
- Thermal Shutdown and Short-circuit Protection
- Pin-compatible with MAX483
- Specified over –40°C to +85°C Temperature Range
- Available in 8-lead SOIC Package
Product Details
The ADM483 is a low power differential line transceiver suitable for half-duplex data communication on multipoint bus trans-mission lines. It is designed for balanced data transmission, and complies with EIA Standards RS-485 and RS-422.The part contains a differential line driver and a differential line receiver. Both share the same differential pins, with either the driver or the receiver being enabled at any given time.The device has an input impedance of 12 kΩ, allowing up to 32 transceivers on one bus. Since only one driver should be enabled at any time, the output of a disabled or powered-down driver is three-stated to avoid overloading the bus. This high impedance driver output is maintained over the entire common-mode voltage range from –7 V to +12 V.
The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating).
The driver outputs are slew-rate limited to reduce EMI and data errors caused by reflections from improperly terminated buses. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit.
The part is fully specified over the industrial temperature range, and is available in an 8-lead SOIC package.
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Product Lifecycle
Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (1)
Documentation
Reference Materials
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Design Resources
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PCN-PDN Information
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