AD14160L

Obsolete

480-MFLOP, Quad DSP, 3.3v, CBGA Package

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Part Details

  • ADSP-21060 Core Processor(...x4)
  • 480 MFLOPS Peak, 320 MFLOPS Sustained
  • 25 ns Instruction Rate, Single-Cycle Instruction Execution-Each of Four Processors
  • 16 Mbit Shared SRAM (Internal to SHARCs)
  • 4 Gigawords Addressable Off-Module Memory
  • Sixteen 40 Mbyte/s Link Ports (Four per SHARC)
  • Eight 40 Mbit/s Independent Serial Ports (Two from Each SHARC)
  • 5 V and 3.3 V Operation
  • 32-Bit Single Precision and 40-Bit Extended Precision IEEE Floating Point Data Formats,
    or 32-Bit FixedPoint data Format
  • IEEE JTAG Standard 1149.1 Test Access Port and On-Chip Emulation
AD14160L
480-MFLOP, Quad DSP, 3.3v, CBGA Package
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