The LTC1266 is a synchronous, step-down switching regulator controller that can drive two external, N-channel MOSFET switches. The superior performance of N-channel MOSFETs enables the LTC1266 to achieve high efficiency at loads of 10A or more with few additional components. Burst Mode® operation provides high efficiency at light loads—efficiency is greater than 90% for loads from 10mA to 10A. The ability to provide 10A at high efficiency is critical for supplying power to Pentium processor applications.
The LTC1266 is based on the LTC1148 architecture and has most of the features of this successful product including constant off-time, current mode architecture with automatic Burst Mode operation. Pin selectable shutdown reduces the DC supply current to 40μA. The LTC1266 also provides pin selectable phase of the top-side driver which allows it to implement, in addition to an all N-channel step-down regulator, a low dropout regulator with high-side P-channel or a boost regulator. Other new features of the LTC1266 include an on-chip low-battery comparator, pin-defeatable Burst Mode operation, a wider voltage supply range (3.5V to 20V), 1% load regulation and a higher maximum frequency of 400kHz.
N-Channel vs P-Channel
The key to the LTC1266's ability to drive large loads at high efficiencies is its ability to drive both top-side and bottom-side N-channel MOSFETs. The superiority of N-channel MOSFETs over P-channels at high currents is due to the lower RDS(ON) and lower gate capacitance of the N-channel parts. To compensate for the higher RDS(ON), the P-channel size is usually made larger, resulting in higher gate capacitance. Efficiency is inversely proportional to both RDS(ON) and gate capacitance. Higher RDS(ON) decreases efficiency due to higher I2R losses and limits the maximum current the MOSFET can handle without exceeding thermal limitations. Higher gate capacitance increases losses due to the increased charge required to switch the MOSFETs on and off during each switching cycle.
Nonetheless, P-channel MOSFETs still have a home in lower current and low dropout applications due to the fact they can operate at 100% duty cycle. The LTC1266 offers the capability of driving either N-channel or P-channel.
Driving N-Channel MOSFETs
P-channels have another distinct advantage—simplicity of the gate drive. Because of the negative threshold of the P-channel, the gate potential must decrease below the source (which is at VIN) by at least VGS(ON) to turn it on. Hence, the top-side MOSFET can be gated between the available supply rail VIN and ground.
Driving an N-channel top-side MOSFET isn't so straightforward. When the top-side MOSFET is turned on, the source is pulled up to VIN. Because the N-channel has a positive threshold voltage, the gate must be above the source by at least VGS(ON). Thus, the top-side drive must swing between ground and VIN + VGS(ON). This requires a second, higher supply rail equal to at least VIN + VGS(ON).
There are two ways to obtain this higher rail. The most straightforward way is to use a higher rail that is already available, as is the case in most desktop systems with 12V supplies. Note that the PWR VIN input to the LTC1266 is dedicated to powering the internal drivers and is separate from the main supply input. The PWR VIN voltage cannot exceed 18V (20V max), limiting the input voltage to 18V – VGS(ON). For a converter with logic-level MOSFETs, this limits VIN to about 13.5V. The PWR VIN voltage must also meet its minimum requirement of VIN + VGS(ON) (about 10V for a 5V-to-3.3V converter) in order not to burn up the high-side MOSFET due to insufficient conductance at larger output loads. If a higher supply rail is not available, a charge-pump circuit can be used to pump VIN to the required level.
Basic Circuit Configurations
Figures 1 and 2 show two basic circuit configurations for the LTC1266. Figure 1 shows an LTC1266 in the charge pump configuration designed to provide a 3.3V/10A output. The Si4410s are new logic-level, surface mount N-channel MOSFETs from Siliconix that provide a mere 0.02Ω of on-resistance at VGS = 4.5V, and thus provide a 10A solution with minimal components. The efficiency plot shows that the converter still is close to 90% efficient at 10A. Because the charge pump configuration is used, PWR VIN = 2 × VIN plus any additional ringing on the switch node. Due to the high AC currents in this circuit, we recommend low ESR OS-CON or AVX input/ output capacitors to maintain efficiency and stability.
The all N-channel, external PWR VIN circuit shown in Figure 2 is a 3.3V/5A surface mount converter. The current sense resistor value is chosen to set the maximum current to 5A, according to the formula IOUT = 100mV/RSENSE. With VIN = 5V, the 5μH inductor and 130pF timing capacitor provide an operating frequency of 175kHz and a ripple current of 1.25A. The VGS(ON) of the Si9410 N-channel MOSFETs is 4.5V; thus the minimum allowable voltage at the external PWR VIN is VIN(MAX) + 4.5V. At the other end, PWR VIN should be kept under the maximum safe level of 18V, limiting VIN to 18V – 4.5V = 13.5V.
The two application circuits demonstrate the fixed 3.3V version of the LTC1266. The LTC1266 is also available in fixed 5V and adjustable versions. All three versions are available in 16-pin narrow SOIC packages.
The LTC1266 synchronous step-down regulator controller has the ability to exploit the superior performance of N-channel MOSFETs to maximize efficiency and provide a low cost, compact solution for high current converters. The extra features provided in this product, Burst Mode inhibit and a low-battery comparator, make it ideal in a wide variety of applications.