Passing EMI Compliance Testing the First Time—Part 4: Power Routing and Stack-Up Planning

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Figure 1

   

摘要

With schematic review, parts placement, and grounding architecture addressed in Part 3, this article turns to the routing decisions that follow. Power system routing deserves attention early in the layout process—before the signal routing begins—because it is one of the largest consumers of board area and directly influences the layer count and stack-up selection. Part 4 of this article series presents a systematic procedure for determining the correct number of layers and the optimal stack-up configuration, from 2-layer through 8-layer designs, ensuring that every signal has a dedicated, field-contained transmission path. Following this procedure from the start of layout eliminates the costly need to restart a design partway through.

Introduction

Part 3 of this series established how to read and organize the schematic for layout, how to approach parts placement, and how to choose between a ground plane and a ground tree. With those foundational decisions in place, it is time to address the routing itself—and the first routing task is not the signals. It is the power system. This article will address the following.

• How to route the power system to support both low- and high-frequency current delivery without generating interference.
• How many layers (generally related to the number of nets) are needed to run all the transmission lines so that each line has its own dedicated transmission space, avoiding interference and electromagnetic interference (EMI).
• How to select the correct stack-up configuration to ensure field containment across every signal layer.

The procedure outlined here builds directly on the placement and grounding decisions from Part 3. Working through these steps in order—power system and signals first, then layer count, then stack-up—will allow for the right configuration early, avoiding costly mid-layout restarts.

System Routing

Some designers leave the power and grounding to the end of the board layout process. It is recommended to tackle this detail right after placement and there are good reasons for doing so. At some point the layer count and stack-up for the PCB need to be considered. Both depend on the complexity of the design and the board dimensions available. It is okay to make this decision after routing begins. For example, in addition to the total number of tracks, high-current runs (needing wide tracks), high-voltage nets (needing additional net separation), and safety spacing all change the board area requirements. These kinds of tracks consume more board space than low-voltage/current analog and digital signals. The power/grounding system is also a big consumer of board space, which is why this will be addressed next. The sooner the correct layer count and stack-up is determined, the better.

Once the parts placement and grounding/power system is in place, the signal layout can get underway. This task should begin with the critical tracks first. Ensure that the important (not necessarily difficult at this point) nets in layout are done correctly before moving on to anything else. This will include all sensitive analog and any high-speed circuits. For each track, always consider both the high- and low-speed return path in the ground, decoupling, and the acquisition of power. For the ground, the high-speed path is easy since it will (by Faraday’s law) track directly under the signal trace. Keep this space dedicated to this signal only. The low-frequency return will take the path of least resistance (as discussed in Part 3), using all available copper.

System Placement

Most signaling tracks are done at 50Ω impedance for good reasons. The lossless impedance of a track is √(L/C, where L is the inductance of a differential length of line, and C is the same differential length’s capacitance to the ground plane(s). A 50Ω track is narrow (good for conserving real estate) yet does not have a large loop area with the ground plane. This is also a Goldilocks impedance when it comes to bandwidth. Lower than 50Ω impedance means inductance becomes a big source of error, while much higher impedances suffer from capacitive shorting and do not work well considering standard board dimensions. None of these arguments matter concerning the delivery of power. The energy flow is agnostic to the impedance of the transmission line as described by Poynting’s vector, S = ExH. As an example, let’s look at delivering 100W, 10V at 10A. A high-impedance line will have more field area or space to make up for the lower field strengths for the input power of 10V at 10A. A low-impedance line (with less dielectric space) will compensate for the smaller volume with larger field strengths (E and H). What does change (and drastically) between these line impedances is the line’s ability to change the rate of energy delivered; this is something to carefully consider when designing the power system for a PCB.

Low-impedance lines, due to low inductance, can deliver power fast since the change in current with respect to time on the line is the voltage divided by the inductance (V = Ldi/dt). Less inductance allows the current to ramp to a higher value in less time (in an ideal voltage supply bus, note that the line voltage is not changing, so the E field is always constant in S = ExH). In addition to supporting fast changes in load, low-impedance power delivery is the only answer concerning interference and this reason is fascinating. The power system is really the common connection to all the circuits. As an example, consider two digital circuits sharing a common power supply and ground. In this case each line driver can connect the signal line to either the supply or ground. When the signal line is tied to the common supply, note that there could be many other digital lines that are also connected to the supply. This will essentially short all lines to the very same net. For this to work, the power line impedance needs to be very low preventing the two (or more) signals from interfering.

The copper used for power and ground play an equal role guiding energy and providing field containment. However, the implementation requirements can be different for analog and digital designs. In a digital design, where transmission lines are hard connected together to the power supply a low-impedance, wide bandwidth supply is needed to prevent EMI and interference. For analog, the actual power supply nets are not required to be planes, although a low-impedance, high-frequency power supply is never a bad idea. The analog system still needs to be decoupled (low impedance) within the analog bandwidth of the system, and this can usually be accomplished with decoupling capacitors.

If the budget can accommodate extra layers in the stack-up, a strip-line (not a micro-strip) design is recommended. Digital logic requires the use of power and ground planes, while ana-log power can be run with tracks generally placed on an x/y grid, always using a consistent direction for routing each layer. Be sure to pay attention to the track current capacity and treat this power track as any other transmission line (adjacent to ground). For individual branches of power and ground, higher currents should run into the power track first, followed by changing currents, followed by lower currents.

With a general idea of how much PCB area is needed and how the power system is done, and in what order the general routing should be done, proceed with routing the remainder of the board. Note that there is no mention of any rules concerning those sensitive tracks earlier. These should be done with only the needs of the transmission line and the analog function in mind. For the rest of the board, just as in the layout of the power system, the same rules must be followed to make it possible to finish the layout (selecting a consistent routing direction/layer in the stack-up). Note that these rules are soft (can be broken sometimes) and should in no way compromise field containment or EMI/electromagnetic compatibility (EMC) best practices. It is best to follow the same general routing direction for each layer in the stack-up that was used for routing power.

Before this, place all the components and take a guess at the number of layers possibly needed and define the stack-up.

Determining Layer Count and Stack-Up

The parts placement and routing should be done block by block since most of the connections on the schematic will be made within a block or circuit group in the design. The block or circuit group that has the most stringent requirement for layer count will determine the layer count for the entire board. The actual stack-up (which layers are ground/signal) does not need to remain consistent from block to block on the PCB.

1. Split up the schematic/board circuitry by blocks.

Arrange the circuits on the board by the likelihood that they will constrain the layer count. By function, consider the type of transmission line (power or signal), and how sensitive they are to interference or how likely they are to radiate themselves.

2. Order the circuit groups by demand for layer count (estimate).
3. Determine the stack-up for group one. This will determine the PCB layer count.
4. Determine the stack-up for each of the remaining circuit groups, in order.
5. Place the parts for each of the circuit groups in the same order.

Place the parts on the board block by block beginning with the first in the previous list. This exercise will help determine the overall area needed. Once this is done, begin working on block 1 (the block most likely to determine the layer count). A stack-up is needed to start layout so let’s begin with a 4-layer board. This will be the lowest layer count that can provide good results with the least cost and effort.

Following the procedure above, place the power system, followed by the critical nets using the first option for a 4-layer board shown in Figure 1.

1. The outer two layers for signal, and the inner two layers for ground.

This method will allow a layout with fewer vias and has some real advantages for switch-mode power supply layouts. This is the preferred method.

2. The outer two layers for ground and the inner two layers for signal.

This technique tends to minimize the generation of radiation and interference. However, since the parts are on the board surface, a via is required for every pin. Next, select the routing directions for the remaining tracks on each layer and continue routing. Always route nets in order of importance. This is difficult, but that’s why it’s crucial to understand everything about the circuit to lay out the board. Once the first block is completed, consider the second block identically. It’s likely that the layout of the first few blocks will reveal if more layers are required. It is not recommended to go down to a 2-layer board unless there is a serious cost constraint.

The number of stack-up options available vs. the number of layers really increases above six layers. Figure 1 outlines some of the possibilities covered in this article.

In all stack-ups, the top and the bottom layers are used for both signal and ground. Top and bottom side signal traces are unavoidable due to the parts placement. For the 2-layer stack-up, ground must be routed with the signals adjacent or directly under on the opposing layer. Power to ground capacitance should be maximized with copper fill after routing is complete. For the 4-layer stack-up, signal and power share layers 2 and 4, while signal and ground share layers 1 and 4. For the 6- and 8-layer stack-ups, the layer count is now high enough to accommodate more signal layers and acceptable stack-ups.

For a 2-Layer Board

There are few options. One solution runs power on the top layer and ground on the bottom (in general). With only two layers, the ground for each connection needs to be run directly under or next to the signal track. After doing this, it is acceptable to fill any remaining top area with copper (power) and any remaining bottom area with copper (ground). Remember that field containment is the goal. As long as each signal has an adjacent ground, this can be accomplished (although this will not contain fields as well as a strip-line transmission line). One good thing is that all frequencies will follow the placed return path. Low-impedance power for this 2-layer option will be from decoupling and only at lower frequencies since there will not be much plane capacitance available. For boards with multiple power rails, a 2-layer option becomes more difficult, especially if these supplies share the same board area.

For a 4-Layer Board

The acceptable stack-ups are shown in Figure 1. In both layouts it is possible to achieve field containment since each signal layer (select a routing direction for each) has a dedicated ground with nothing getting in the way. More options are available for the 6-and 8-layer boards.

Each of these stack-ups so far have assumed solid ground/power planes, which would be a great assumption for an all-digital design where the return currents are all known by Faraday’s law. There is more to consider if the design contains analog—especially if there are extra sensitive measurements (microvolts or picoamps) or where high accuracy is needed. High-speed analog or RF designs layer in different concerns, which are addressed in Part 5 of this series.

Conclusion

Power system routing and stack-up selection are not decisions to defer to the end of a layout. By addressing the power system immediately after placement and working through the layer count and stack-up systematically—block by block, starting with the most demanding circuit group—a foundation is locked in that supports the entire design. A 4-layer board is almost always the right starting point, and the stack-up options outlined here will serve most designs. For those with precision analog circuits, multi-ground systems, or significant thermal challenges, Part 5 of this series addresses the additional layout considerations that will carry the design across the finish line.

References

Feynman, Richard P., Robert B. Leighton, and Matthew Sands. The Feynman Lectures on Physics, Vol. 2: The New Millennium Edition: Mainly Electromagnetism and Matter. Basic Books, 2011.

Johnson, Howard W. and Martin Graham. High-Speed Digital Design: A Handbook of Blac Magic. PTR Prentice Hall, April 1993.

Morrison, Ralph. Fast Circuit Boards: Energy Management. John Wiley & Sons Publications, January 2018.

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