### 摘要

The article “Multiphase Solutions for High Current, Fast Transient, Noise Sensitive
Applications—Part 1” highlights the unmatched high control loop bandwidth of
Analog Devices’ Silent Switcher 3 technology in multiphase monolithic buck
regulators. Significant reductions in recovery time and peak-to-peak output
voltage deviation during a transient event are observed when transitioning from
single-phase to multiphase design. In this article, coupled inductors (CLs) are
incorporated into the design of multiphase Silent Switcher^{®} 3 monolithic buck regulators to push loop bandwidth beyond 500 kHz and reduce output ripples to
below 1 mV peak to peak. Suppression of low frequency output noise due to high
loop bandwidth is also explored. This article also shows a healthcare imaging
application to compare the effects of CLs and conventional discrete inductors
(DLs) on multiphase performance.

### Expanding Multiphase Capabilities with CLs

Multiphase interleaving buck converters are commonly employed in servers and wired communication applications because they can efficiently handle substantial load currents and provide a high control loop bandwidth. However, a limiting condition of multiphase interleaving buck converters is the different behaviors needed of the phase inductor during steady-state operation and a transient event. To achieve higher efficiency, high inductance is favored to limit current ripples and minimize switching losses. On the other hand, for a faster response to transient events, low inductance allows the charge from the power source to reach the load quickly, resulting in a smaller drop in output voltage. Using smaller magnetics reduces the excess charge stored in the phase inductor and reduces any overshoot in output voltage when the load is removed. This trade-off between efficiency and transient response highlights the benefits that CLs bring to a multiphase design.

CLs can be thought of as a specialized type of transformers that primarily influence the behavior of other windings through magnetic coupling. In a multiphase setup, the interleaving of switching signals with DLs only reduces ripples at the output node. In comparison, CLs propagate this effect to MOSFETs and inductor windings of all connected phases. As one phase is activated, the magnetic coupling induces a current ramp-up in other coupled phases without their duty cycles changing. This means that the inductor current doesn’t decrease linearly during its phase’s off-time and starts to rise again when other phases activate. As a result, CLs can have a lower phase inductance while still producing minimal current ripple per phase, allowing for both fast transient response and high efficiency. The reduced phase inductance leads to a faster current slew rate during a transient event and pushes control bandwidth higher without sacrificing stability.

### Control Loop and Transient Response Comparison Between Discrete and CLs

Healthcare imaging systems typically consist of large amounts of data acquisition circuits and DSP/ASICs. Power supplies for large imaging systems like CT
scan machines need both fast transient response and low output noise to yield
minimal signal distortion and high image accuracy. A typical CT scan detector
module power supply as an example requires 1 V_{OUT} with full load current of
80 A from 12 V_{IN} input. ADI’s LT8627SP, part of the Silent Switcher 3 monolithic
buck regulator family, can deliver up to 16 A and has ultralow noise reference to
achieve exceptional low frequency noise performance. Using a 6-phase LT8627SP
meets the application’s requirements for loads up to 96 A. The phases are inter-leaved at a 2 MHz switching frequency to produce a combined 12 MHz output
ripple frequency. The output capacitance consists of 28× 22 μF 1206 MLCC capacitors and 2× 560 μF polymer tantalum solid capacitors (POSCAP). To understand how
CLs perform against the more traditional DLs, the operating conditions and output
capacitors remain unchanged to isolate the impact of different inductor types on
the regulator’s performance.

Commercially available 2-phase and 3-phase CLs can be used in a 6-phase LT8627SP configuration, either in a 3× 2-phase or 2× 3-phase setup. For this investigation, two types of Eaton CLs with different phase inductances were selected. Two-phase CL options include Eaton CL1206-2-R120 (120 nH) and CL0806-2-R050 (50 nH). The 3-phase CL tested is Eaton CL0806-3-R050 (50 nH). To provide a basis for comparison with CLs, the Coilcraft XGL5050-161 is used as a reference for DL performance due to its comparable 160 nH nominal inductance, which is similar to the 2-phase 120 nH CLs (CL1206-2-R120) and it has a similar size profile to the selected CLs’.

Discrete L | Coupled L | |||

Manufacturer | Coilcraft | Eaton | ||

Inductor | XGL5050-161 | CL1206-2-R120 | CL0806-2-R050 | CL0806-3-R050 |

Lk^{1} |
160 nH | 120 nH | 50 nH | 50 nH |

Lm^{2} |
- | 130 nH | 120 nH | 120 nH/130 nH |

I_{SAT} (20% drop) |
23.5 A | 49 A | 70 A | 70 A |

DCR | 1.20 mΩ | 0.40 mΩ | 0.25 mΩ | 0.25 mΩ |

^{1} CL leakage inductance and is equivalent to DL phase inductance.^{2} CL magnetizing inductance. The ratio of leakage to magnetizing inductances determines the coupling coefficient. |

The compensation network is optimized when experimenting with each inductor to achieve at least a 60° phase margin and an 8 dB gain margin while maximizing loop bandwidth. The compensation tuning leads to the highest bandwidth of 520 kHz with a 60° phase margin and 9 dB gain margin when using CL0806-3-R050 inductors.

The Bode plot results are featured in Figure 1 and grouped for easier progressive
comparison. The results show loop bandwidth can be pushed higher when the
system increases the number of phases coupled, or *N _{cp}*, albeit same phase inductance (XGL5050-161 vs. CL1206-2-R120). Moreover, the loop bandwidth is extended
when decreasing phase inductance and keeping

*N*constant (CL1206-2-R120 vs. CL0806-2-R050).

_{cp}To analyze the fast high current transient capability of the 6-phase LT8627SP, a 50% load step with a rigorous slew rate of 40 A/µs was applied. As shown in Figure 2, the output voltage was observed to recover simultaneously with the completion of the load step. All output voltages stabilized within one microsecond after this deviation, showcasing the LT8627SP’s exceptional ability to respond rapidly to changes. The results also established a consistent pattern: as the system’s responsiveness (bandwidth) is increased, the variation in output voltage decreased. The complete 6-phase 96 A circuit schematics using LT8627SP is shown in Figure 5.

### Steady-State Output Ripple Comparison for Discrete and CLs

While a higher loop bandwidth reduces output deviation during a transient event, steady-state (SS) output ripples are influenced by both the total peak-to-peak current ripple and the amount of output capacitance. The advantage of using CLs lies in their capacity to generate smaller per-phase current ripples compared to DLs with equivalent phase inductance. However, the combined per-phase current ripples at the output lead to the same total peak-to-peak current ripple for both CLs and DLs, resulting in similar total peak-to-peak output voltage ripples. Table 2 provides a review of the SS output ripple measurements for a 6-phase LT8627SP, employing optimized compensation for each inductor. The output ripples, approximately 1 mV ppk, for the design utilizing XGL5050-160 and CL1206-2-R120 confirm this concept due to their similar phase inductance. However, for designs utilizing 2-phase and 3-phase 50 nH CLs, the measured output ripples contradicted this principle, increasing from 1.33 mV ppk to 2.10 mV ppk. This was surprising because it was expected that having the same phase inductance would lead to a consistent total output ripple.

L | Control Bandwidth | Transient ∆Vout_ppk |
SS ∆Vout_ppk |

XGL5050-160 | 367 kHz | 118 mV | 1.06 mV |

CL1206-2-R120 | 421 kHz | 91.4 mV | 0.95 mV |

CL0806-2-R050 | 509 kHz | 79.0 mV | 1.33 mV |

CL0806-3-R050 | 520 kHz | 76.6 mV | 2.10 mV |

The magnetic coupling of CLs induces current ramp up in other coupled phases
without the phases’ duty cycles needing to turn on. This effectively introduces a
ripple harmonic of frequency equivalent to *f _{sw} × N_{cp}* at the output. The greater the peak-to-peak voltage ripple suggests that the ceramic output capacitors have
become less effective at shunting ripple noises with increasing switching harmonics. Real capacitors behave like a series RLC subcircuit due to the parasitic inductance and resistance (ESL and ESR) in the packaging. This causes capacitors to exhibit different impedance characteristics with varying frequencies. The
impedance vs. frequency curve for a 22 μF 1206 multilayer ceramic capacitor
(MLCC) used in the design shows how the capacitor begins to show more inductive
properties and higher impedance starting at 1 MHz. So, expecting similar ripple
levels when moving from 2-phase to 3-phase CLs is not realistic. This is because
the output ripple in the steady state is affected by the changing characteristics
of the output capacitors.

One way to reduce output ripple without increasing the solution’s size is by using three-terminal (3T) capacitors, which are known for their low ESL large capacitance across a wide bandwidth. The impedance curve of a 22 μF 3T capacitor shows the same problem of increasing impedance from 4 MHz to 6 MHz (specific switching harmonics due to 2-phase and 3-phase coupling) as in the case of an MLCC. Therefore, the output ripple is still expected to increase when replacing 2-phase with 3-phase CLs. Impedance, however, is one magnitude smaller at high frequencies for 3T capacitors and will produce smaller ripple compared to traditional ceramic capacitors. The substantial improvement is shown in Figure 4 as the output ripple reduces from 2.10 mV ppk to 0.81 mV ppk after switching 2× 22 μF 1206 MLCCs to 2× 22 μF 05035 3T capacitors. To use 3T capacitors effectively, they are placed at the closest spot after the CLs to minimize parasitic inductance. Details can be referred to Figure 6. This outcome makes for a compelling use of 3T capacitors given the same discrete capacitance. The overall design retains the same number of capacitors and output capacitance but benefits greatly from smaller output ripples.

### Broadband Output Noise Comparison for Single and Multiphase LT8627SP

Although seldom discussed, one of the significant advantages of a higher loop bandwidth is the reduction in output noise. The Silent Switcher 3 ultralow noise architecture gives excellent wideband noise performance (typically 4 μV rms from 10 Hz to 100 kHz), a feature that has become a critical performance metric for noise-sensitive applications. What is commonly referred to as noise is random amplitude residue resulting from the regulator’s rapid switching transitions. Thus, the higher the loop bandwidth, the lower the overall output noise as high DC gain is maintained for a longer range of frequencies to correct any residual steady-state output error or noise. As seen in Figure 7, a higher loop bandwidth noticeably improves overall output noise by attenuating low frequency noise over a wider range of frequencies up to the control loop crossover frequency. The noise curves of the 1-phase and 4-phase LT8627SP solutions are based on designs presented in Part 1 of this article series, while the 6-phase LT8627SP noise curve is measured using the 6-phase design that achieved 520 kHz BW with 3-phase 50 nH CLs.

### Design Considerations and Guidance for Multiphase LT8627SP with CLs

The following provides some key considerations when designing with ADI’s LT8627SP:

- Different interleaving schemes are needed when using 2-phase vs. 3-phase
CLs to maximize the ripple reduction benefits. For 2-phase CLs, the coupled
phases’ switching signals are interleaved at 180° apart compared to a 120°
switching delay for coupled phases using 3-phase CLs. The general formula
for optimal phase delay between coupled phases is 360°/
*N*._{cp} - Consistent measurement of steady-state output ripples when using CLs requires the use of low profile probing terminal, such as U.FL sockets, to avoid picking up noises emitted from unshielded CLs. As discussed in this article, probing output ripples with U.FL terminal produced near ideal voltage ripples.
- Measuring Bode plots for multiphase monolithic switching regulators can be a challenging task since each regulator IC has its own feedback and control logic. To ensure the multiphase design responds cohesively, OUTS and VC pins of all ICs should be tied together as shown in the schematic. This deliberate routing ensures that signal injections across any one feedback resistor will create the same perturbations seen across all individual control loops. With sharing of the same compensation network, the control loops of all phases are forced to respond collectively. Refer to Figure 6 for multiphase layout guidelines.

### Conclusion

Incorporating CLs into ADI’s multiphase Silent Switcher 3 architecture power converters elevated their performance to an exceptional level. This design enhances their ability to handle rapid, high current changes and significantly reduces output noise. With the capability to handle dynamic loads exceeding 500 kHz loop bandwidth and providing extended suppression of low frequency output noise, multiphase Silent Switcher 3 switching regulators become a viable solution for applications in wireless communication, industrial settings, defense systems, and healthcare technology. With newer generations of switching regulators operating at frequency rates above one megahertz, traditional ceramic capacitors have become the bottleneck in minimizing output ripples. Capacitors with lower impedance characteristics, such as 3-terminal capacitors, are needed for smaller output ripples at higher frequencies. By combining CLs and low impedance output capacitors, an all around fast responding and low ripple switching regulator can be produced, as demonstrated by the multiphase Silent Switcher 3 switching regulator.