AN-837: DDS-Based Clock Jitter Performance vs. DAC Reconstruction Filter Performance

A reconstruction filter is an important element for creating a clean, low jitter clock signal from a direct digital synthesizer (DDS). A reconstruction filter is used at the output of the DAC to attenuate image frequencies. However, a physical filter cannot be implemented with ideal stop band rejection extending out to infinite frequency. This is due to component parasitic effects as well as the physical limitations of printed circuit board layout. Failing to use a reconstruction filter with sufficient stop-band rejection can degrade the performance of the DDS.

A Filter Layout Experiment

This application note describes the results obtained from a filter layout experiment and discusses how layout and component selection impact stop-band rejection. This experiment focuses on three LC low-pass filter layouts described in this application note as Filter A, Filter B, and Filter C. All three filters are nearly identical in terms of component values and desired response characteristics. The purpose of the experiment is to restrict the experimental variables to the physical layout and the physical construction of the components.

A companion application note, AN-823, also available from Analog Devices, Inc., should be used in conjunction with this application note.

When using a DDS for clock generation, insufficient attenuation of DAC image frequencies can significantly affect system periodic jitter performance. Image frequencies theoretically extend to infinity frequency with magnitudes that follow a sin(x)/x response curve. Figure 1 depicts the DAC output spectrum.

The following formula calculates the theoretical magnitude (dBc) of any desired image frequency relative to f_OUT, where ƒ is the frequency of the image and ƒ_C is the DAC sample rate:

The Importance of a Reconstruction Filter

Figure 2 displays the measured power of the image frequencies in the absence of a reconstruction filter. The displayed attenuation of the image frequencies is due solely to the sin(x)/x response of the DAC output. Sometimes these images are used as the desired signal, in which case a band-pass filter is required instead of a low-pass filter. In the spectral plot in Figure 2, the DDS sampling clock (f_C) is 200 MHz and f_OUT is set to 10 MHz.

This plot (Figure 2) demonstrates the importance of using a reconstruction filter with adequate stop-band rejection. Note that there is significant energy contained in the image frequencies that must be eliminated, and the task of elimination falls squarely on the stop band performance of the filter. Unfortunately, the stop-band rejection of a practical filter degrades as frequencies extend well beyond the pass band. This is due to nonideal components and the physical layout of the components on a printed circuit board (PCB). For example, real capacitors and inductors are not strictly capacitive or inductive.

Each can be modeled as having resistive (R), inductive (L) and capacitive (C) elements, as shown in Figure 3. From these models, it is evident that there is a self-resonant component made up of the L and C combination and an insertion loss component due to R.

Filter layout can significantly affect stop-band rejection due to parasitic capacitance between trace pads of the components, which can unintentionally couple signals from input to output. Optimal stop band rejection requires attention to both component selection and layout details. To evaluate the stop band performance of a filter, it should be measured at frequencies well beyond its designed corner frequency to ensure that image frequencies can be adequately rejected. The recommendation is to observe stop-band rejection out to several gigahertz, or at least out to 5 f_C.

Off-the-shelf filters such as SAW, crystal, ceramic, or prepackaged LC filters are valid candidates for reconstruction filters. However, before choosing a filter type, take care to determine the stop-band rejection and insertion loss stated in the filter manufacturer's data sheet. The stop-band rejection specification is always given for a finite bandwidth. This bandwidth may be too narrow to determine its adequacy with regards to extended stop-band rejection. In such cases, validate the filter stop-band performance before a final selection is made.

Designing a Discrete LC Low-Pass Filter

A discrete LC low-pass filter is relatively inexpensive to implement and offers significant flexibility. From a component selection perspective, achieving optimal pass-band and stop-band performance begins with choosing components with a high self-resonant frequency and a high Q property. Components with a high Q rating are desirable for their lower series R value. In a low-pass filter, this can decrease the insertion loss for the series inductors and decrease the impedance for the shunt capacitors. Consequently, the task of choosing components with both high Q and high self-resonant frequency can be challenging. Generally, the physics involved in the construction of capacitors and inductors tends to make high Q and high self-resonant frequency mutually exclusive parameters. Components must be carefully selected to yield optimal performance.

Choosing Components

The self-resonant frequency of each component is dictated by the component value and its physical construction. Choosing a smaller size package is usually a better choice. A smaller package generally exhibits a higher self-resonant frequency and reduces the parasitic effects associated with PCB layout. In the case of shunt capacitors, the self-resonance can be pushed out to higher frequencies by using two capacitors connected in parallel with only one-half the value of the original component. The impact of this technique is described in the Filter Experiment Results section.

Choosing components with less insertion loss provides more signal amplitude at the filter output. A reduction in amplitude has a direct impact on the slew rate of the output signal. Increased slew rate applied to the input of a receiver or squarer decreases wide band noise. Refer to AN-823 for details on the importance of signal amplitude in the context of timing jitter.

Implementation of a Discrete LC Low-Pass Elliptic Filter

A filter of the elliptical, or Cauer, response variety is typically recommended for an LC low-pass reconstruction filter. When compared to the other response types, an elliptic filter offers the fastest transition from pass band to stop band for a given level of complexity (that is, filter order).

This characteristic makes the elliptic filter an attractive candidate as a reconstruction filter. Figure 4 displays a set of representative response curves of these four basic filter types: Cauer, Chebyshev, Butterworth, and Bessel.

The tradeoff for the steep roll-off offered by the elliptic response is the appearance of response ripples in the pass band and the stop band. Note that the magnitude of the pass-band ripple shown in Figure 4 was arbitrarily drawn for demonstration purposes only. Although some pass-band ripple is necessary in an elliptic filter design, it is one of the parameters that the filter designer can control. Therefore, its magnitude is dependent on the particular filter design.

Pass-band ripple can impact certain DDS applications. In single tone applications, such as carrier signal generation, pass-band ripple is not a critical parameter. However, in those applications where the DDS generates a modulated carrier, pass-band ripple must be considered as a crucial factor in the filter design.

LC filters are available in two general forms dictated by whether the driving circuit is a current source or voltage source. If driven by a current source, the first element is shunt connected, whereas the first element is series connected for a voltage source.

Figure 5 shows a shunt-connected, seventh-order, elliptical, low-pass LC filter.

Filter Experiment Results

Figure 7 displays the results obtained from the experimental filter board containing Filter A, Filter B, and Filter C. The top trace in each plot is the measured frequency response of the filter; the bottom trace is the measured spectrum from a DDS evaluation board after passing through the experimental filter.

The measurement configuration is shown in Figure 6.

Note that the DSS evaluation board contains an output coupling transformer that has a bandwidth of ~300 MHz. Therefore, there is additional attenuation in the measured spectrum at frequencies above ~300 MHz due to the response of the transformer.

The three LC low-pass elliptic filter implementations demon-strate varying image rejection due to PCB layout. All three implementations are seventh-order elliptical 160 MHz low-pass filters using discrete LC components.

The DDS filtered output frequency for all plots is set to 110.123 MHz with a DAC sample rate of 500 MSPS (REFCLK). Note that a transformer (ADTT1-1 available from Mini-Circuits^®) differentially couples the DDS outputs. The transformer output provides a single-ended connection to the filter input.

The measured frequency response of the filters shown in Figure 7 is from 0 Hz to 3.5 GHz (the upper frequency limit of the measurement instrument). For a 1 GHz DDS, it is recommended that measurements extend beyond 3.5 GHz to better characterize the filter stop-band response.

In applications requiring very low jitter, adequate suppression of DAC image frequencies is critical. In fact, there is a direct relationship between the magnitude of a nonharmonic spectral spur and the resulting periodic jitter, given by:

where dBc is the spur magnitude relative to the fundamental magnitude.

A plot of this formula is shown in Figure 8. The jitter is expressed as peak-to-peak unit intervals (UI). One UI is one period of the associated clock signal. Expressing the jitter in UI allows the plot to apply to any arbitrary clock signal. For example, if a clock signal exhibits a −35 dBc nonharmonic spur, then one can expect about 0.006 UI of peak-to-peak jitter due solely to the spur.

Assuming a clock frequency of 100 MHz, then 1 UI is 10 ns, therefore 0.006 UI equates to 60 ps (0.006 × 10 ns) for a 100 MHz clock. When using this plot, keep in mind that the jitter values are for a single spurious component. When multiple spurs are present, their individual contributions must be summed in the argument for the arctan function as shown in the previous equation.

For example, the peak-to-peak jitter associated with N spurs takes the form:

Furthermore, the plot does not address random jitter, the effects of which must be considered separately.

Filter Schematics

Bills of Materials for Filters

The Bill of Materials for Filter A is provided in Table 1 while the Bill of Materials for Filter B and Filter C are provided in Table 2. Note that the following points for these Bills of Materials:

• The quantity for all materials is 1.
• The size of all materials is 0402.
• All materials are Murata Manufacturing Company, Ltd. parts.

PCB Filter Layout Considerations

The list below offers useful layout tips for obtaining optimal performance from the reconstruction filter.

• Use a solid (uninterrupted) ground plane below the components to lower the loop inductance of the circuit, thus lowering the impedance for return currents.
• Split shunt capacitors as shown with Filter A (see Figure 7) to increase the self-resonant frequency of the capacitors and lower the inductive connection to ground. In addition, use a top ground plane alongside for the shunt components in combination with the bottom ground plane. This can further lower the inductive connection to ground. Use multiple vias to tie both ground planes together.
• Avoid placing the filter components in close proximity with one another. Filter C (see Figure 7) is a good example of a layout where components are crowded. When components are crowded, trace parasitics and mutual coupling can affect the frequency response of the filter.
• Use components with both as high a self-resonant frequency and as high a Q factor as possible.
• Maintain the impedance of the traces to match the characteristic impedance of the filter. This is not as critical for component interconnections, but it is important for the traces that interface to circuits external to the filter, such as the input and output connections.

Final Points

A DDS is a sampled data system that produces a spectrum with multiple copies of the fundamental arrayed around multiples of the sampling frequency.

The magnitude of these image frequencies can be the dominant source of periodic jitter. Any spur present at the output of the filter and within the input bandwidth of the receiver degrades performance in proportion to the spur magnitude. Therefore, before settling on a DAC reconstruction filter, measure the filter performance to ensure that it meets the requirements of the application.

Keep in mind that filter design software programs that do not support the inclusion of component and layout parameters only simulate the ideal filter frequency response. The actual frequency response varies depending on the actual high frequency characteristics of the components and the printed circuit board.

作者

David Brandon

David Brandon 是ADI公司高速放大器部门（位于北卡罗来纳州格林斯博罗）的产品工程师。David从1982年开始便在ADI公司工作，迄今已35年。他在DDS部门担任应用工程师愈20年，发表了多篇应用笔记和杂志文章。David经常与Rob Reeder和其他人合作评估新的行业器件声明和交流测试设备功能。David业余时间喜欢打高尔夫球，并与家人共度美好时光。David于1982年获得美国北卡罗来纳州格林斯博罗的吉尔福德科技社区学院电气工程学位。

Ken Gentile

Ken Gentile 于1998 年加入ADI 公司，担任时钟与信号频率合成产品线系统设计工程师，办公地点在北卡罗来纳州格林斯博罗。他的专长是直接数字频率合成、模拟滤波器设计和编写MATLAB 中基于GUI 的工程工具。Ken 拥有10 项专利。他在各种行业杂志上发表了14 篇文章以及十几篇ADI 应用笔记，另外还出席了2001、2005 和2006 年的ADI 年度技术研讨会(GTC)。他于1996年毕业于北卡罗来纳州立大学，获得电气工程学士学位。业余时间，Ken 喜欢阅读、玩数学智力游戏，以及从事与科学、工程和"后院"天文学相关的大部分活动。