Technical Documentation

TECHNICAL DOCUMENTATION — ADN2819 : Multi Rate Limiting Amplifier and Clock and Data Recovery ICs

 
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Application Notes (1)
  • AN-636: ADN2819 Evaluation Board  (pdf, 317 kB)
    This application note describes the use of the ADN2819 evaluation board. The ADN2819 is a multirate clock recovery, data-retiming device based on a multiloop PLL architecture. The ADN2819 can recover clock and data at SONET OC-3,OC-12,OC-48,and Gigabit Ethernet data rates as well as 15/14 Forward Error Correction (FEC)for these rates by using a single reference clock or external crystal oscillator.
Data Sheets (1)
Glossary (1)
Overview (2)
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