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AD9551:  Multiservice Clock Generator

The AD9551 accepts one or two reference input signals to synthe-size one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended and differential operation.

Reference conditioning and switchover circuitry internally synchronizes the two ...More

AD9551:  Multiservice Clock Generator

Product Description

The AD9551 accepts one or two reference input signals to synthe-size one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended and differential operation.

Reference conditioning and switchover circuitry internally synchronizes the two references so that if one reference fails, there is virtually no phase perturbation at the output.

The AD9551 uses an external crystal and an internal DCXO to provide for holdover operation. If both references fail, the device maintains a steady output signal.

The AD9551 provides pin-selectable, preset divider values for standard (and FEC adjusted) network frequencies. The pin-selectable frequencies include any combination of 15 possible input frequencies and 16 possible output frequencies. A SPI interface provides further flexibility by making it possible to program almost any rational input/output frequency ratio.

The AD9551 is a clock generator that employs fractional-N-based phase-locked loops (PLL) using sigma-delta (Σ-Δ) modulators (SDMs). The fractional frequency synthesis capability enables the device to meet the frequency and feature requirements for multiservice switch applications. The AD9551 precisely generates a wide range of standard frequencies when using any one of those same standard frequencies as a timing base (reference). The primary challenge of this function is the precise generation of the desired output frequency because even a slight output frequency error can cause problems for downstream clocking circuits in the form of bit or cycle slips. The requirement for exact frequency translation in such applications necessitates the use of a frac-tional-N-based PLL architecture with variable modulus.

Applications
  • Multiservice switches
  • Multiservice routers
  • Exact network clock frequency translation
  • General-purpose frequency translation

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  • Translation between any two standard network rates
  • Dual reference inputs and dual clock outputs
  • Pin programmable for standard network rate translation
  • SPI programmable for arbitrary rational rate translation
  • Output frequencies from 10 MHz to 900 MHz
  • Input frequencies from 19.44 MHz to 806 MHz
  • On-chip VCO
  • Meets OC-192 high band jitter generation requirement
  • Supports standard forward error correction (FEC) rates
  • Supports holdover operation
  • Supports hitless switchover and phase build-out (even with unequal reference frequencies)
  • SPI-compatible 3-wire programming interface
  • Primary Clock Function: Generation
  • On-Chip Multiplier: PLL Core
  • +Supply Voltage (V): 3.3V
  • Max Input Frequency: 806MHz
  • # of Outputs: 2
  • Max f-out (MHz): 900MHz
  • I/O Interface: Serial
  • Package: 40-LFCSP
  • Output Logic: CMOS,LVDS,LVPECL
  • Product Description: Multiservice Clock Generator

AD9551 Functional Block Diagram

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Part# Product Description +Supply Voltage (V) # of Inputs # of Outputs On-Chip VCO or DCO Max f-out (MHz) Output Logic Random Jitter (ps-RMS) Package Price* (1000-4999)
AD9510 Multi-Output Clock Generator 3.3 1 8 No 1200 CMOS, LVDS, LVPECL 0.225 64-LFCSP $12.09
AD9511 Multi-Output Clock Generator 3.3 1 5 No 1200 CMOS, LVDS, LVPECL 0.225 48-LFCSP $10.07
AD9512 Clock Divider 3.3 1 5 No 1200 CMOS, LVDS, LVPECL 0.225 48-LFCSP $9.06
AD9513 Clock Divider 3.3 1 3 No 800 CMOS, LVDS 0.3 32-LFCSP $6.02
AD9514 Clock Divider 3.3 1 3 No 1600 CMOS, LVDS, LVPECL 0.225 32-LFCSP $6.02
AD9515 Clock Divider 3.3 1 2 No 1600 CMOS, LVDS, LVPECL 0.225 32-LFCSP $4.81
AD9516-0 Multi-Output Clock Generator 3.3 2 14 Yes 2950 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
AD9516-1 Multi-Output Clock Generator 3.3 2 14 Yes 2650 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
AD9516-2 Multi-Output Clock Generator 3.3 2 14 Yes 2335 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
AD9516-3 Multi-Output Clock Generator 3.3 2 14 Yes 2250 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
AD9516-4 Multi-Output Clock Generator 3.3 2 14 Yes 1800 CMOS, LVDS, LVPECL 0.4 64-LFCSP $12.65
AD9517-0 Multi-Output Clock Generator 3.3 2 12 Yes 2950 CMOS, LVDS, LVPECL 0.4 48-LFCSP $11.54
AD9517-1 Multi-Output Clock Generator 3.3 2 12 Yes 2650 CMOS, LVDS, LVPECL 0.4 48-LFCSP $11.54
AD9517-2 Multi-Output Clock Generator 3.3 2 12 Yes 2335 CMOS, LVDS, LVPECL 0.4 48-LFCSP $11.54
AD9517-3 Multi-Output Clock Generator 3.3 2 12 Yes 2250 CMOS, LVDS, LVPECL 0.4 48-LFCSP $11.54
AD9517-4 Multi-Output Clock Generator 3.3 2 12 Yes 1800 CMOS, LVDS, LVPECL 0.4 48-LFCSP $11.54
AD9518-0 Multi-Output Clock Generator 3.3 2 6 Yes 2950 LVPECL 0.4 48-LFCSP $9.97
AD9518-1 Multi-Output Clock Generator 3.3 2 6 Yes 2650 LVPECL 0.4 48-LFCSP $9.97
AD9518-2 Multi-Output Clock Generator 3.3 2 6 Yes 2335 LVPECL 0.4 48-LFCSP $9.97
AD9518-3 Multi-Output Clock Generator 3.3 2 6 Yes 2250 LVPECL 0.4 48-LFCSP $9.97
AD9518-4 Multi-Output Clock Generator 3.3 2 6 Yes 1800 LVPECL 0.4 48-LFCSP $9.97
AD9520-0 Multi-Output Clock Generator 3.3 - - Yes 1600 CMOS, LVDS, LVPECL 0.225 - $12.65
AD9520-1 Multi-Output Clock Generator 3.3 1 12 Yes 2650 CMOS, LVPECL 0.225 64-LFCSP $12.65
AD9520-2 Multi-Output Clock Generator 3.3 1 12 Yes 2335 CMOS, LVPECL 0.225 64-LFCSP $12.65
AD9520-3 Multi-Clock Output Generator 3.3 1 12 Yes 2250 CMOS, LVPECL 0.225 64-LFCSP $12.65
AD9520-5 Multi-Output Clock Generator 3.3 1 12 No 2400 CMOS, LVDS, LVPECL 0.225 64-LFCSP $11.50
AD9522-0 Multi-Output Clock Generator 3.3 1 12 Yes 2950 CMOS, LVDS 0.242 64-LFCSP $12.65
AD9522-1 - 3.3 1 12 Yes 2650 CMOS, LVDS 0.242 64-LFCSP $12.65
AD9522-2 Multi-Output Clock Generator 3.3 1 12 Yes 2335 CMOS, LVPECL 0.242 64-LFCSP $12.65
AD9522-3 Multi-Output Clock Generator 3.3 1 12 Yes 2250 CMOS, LVPECL 0.245 64-LFCSP $12.65
AD9522-4 Multi-Output Clock Generator 3.3 1 12 Yes 1600 CMOS, LVDS 0.242 64-LFCSP $12.65
AD9522-5 Multi-Output Clcok Generator 3.3 1 12 No 2400 CMOS, LVDS, LVPECL 0.242 64-LFCSP $10.11
AD9540 Clock Generator Synchronizer 3.3 1 1 No 655 CML, PECL-Compliant 0.7 48-LFCSP $10.07
AD9549 Clock Generator Synchronizer 3.3 2 2 Yes 750 CMOS, HSTL 0.6 64-LFCSP $12.56
AD9551 Multiservice Clock Generator 3.3 2 2 Yes 900 CMOS, LVDS, LVPECL 0.1 40-LFCSP $14.75
ADCLK846 - 1.8 1 6 No 1200 CMOS, LVDS 0.1 24-LFCSP $5.19
ADCLK854 - 1.8 2 12 No 1200 CMOS, LVPECL 0.1 48-LFCSP $5.95
ADCLK905 Clock Buffer 3.3 1 1 No 6000 ECL, LVPECL, PECL 0.06 16-LFCSP $5.67
ADCLK907 Clock Buffer 3.3 2 2 No 6000 ECL, LVPECL, PECL 0.06 16-LFCSP $6.83
ADCLK925 Clock Buffer 3.3 1 2 No 6000 ECL, LVPECL, PECL 0.06 16-LFCSP $5.95
ADCLK946 Six LVPECL Outputs, SiGe Clock Fanout Buffer 3.3 1 6 No 4800 LVPECL 0.075 24-LFCSP $6.25
ADCLK954 - 3.3 2 12 - 4800 LVPECL 0.075 40-LFCSP $6.95
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*The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.
**Sample availability may be better than production availability. Please enter samples into your cart to check sample availability.