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ADV3002:  4:1 HDMI/DVI Switch with Equalization DDC/CEC Buffers and EDID Replication

The ADV3002 is a complete HDMI™/DVI link switch featuring equalized transition minimized differential signaling (TMDS) inputs, ideal for systems with long cable runs. The ADV3002 includes bidirectional buffering for the DDC bus and CEC line, with integrated pull-up resistors for the CEC line. Additionally, the ADV3002 includes an EDID replication function that enables one EDID EEPROM to be shared ...More

ADV3002:  4:1 HDMI/DVI Switch with Equalization DDC/CEC Buffers and EDID Replication

Product Description

The ADV3002 is a complete HDMI™/DVI link switch featuring equalized transition minimized differential signaling (TMDS) inputs, ideal for systems with long cable runs. The ADV3002 includes bidirectional buffering for the DDC bus and CEC line, with integrated pull-up resistors for the CEC line. Additionally, the ADV3002 includes an EDID replication function that enables one EDID EEPROM to be shared for all four HDMI ports.

The ADV3002 is provided in a space-saving, 80-lead LQFP surface-mount Pb-free plastic package and is specified to operate over the 0°C to 85°C temperature range.

Product Highlights

  1. Input cable equalizer enables use of long cables at the input. For a 24 AWG cable, the ADV3002 compensates for more than 20m at data rates up to 2.25 Gbps.
  2. Auxiliary multiplexer isolates and buffers the DDC bus and the CEC line, increasing total system capacitance limit.
  3. EDID replication eliminates the need for multiple EDID EEPROMs. EDID can be loaded from a single external EEPROM or from a system microcontroller.
  4. 5 V power combiner powers the EDID replicator and CEC buffer when local system power is off.
  5. Integrated hot plug detect pulse low on channel switch with programmable pulse width or direct manual control.

Applications

  • Advanced television (HDTV) sets
  • Projectors
  • A/V receivers
  • Set-top boxes
    • 4 inputs, 1 output HDMI/DVI links
    • HDMI 1.3a receive and transmit compliant
    • 4 TMDS channels per link
    • Bidirectional DDC buffers (SDA and SCL)
    • EDID replication reduces component count, while enabling simultaneous access to all HDMI sources
    • 5 V combiner provides power to EDID replicator and CEC buffer when local system power is off
    • ±8kV ESD protection on input pins
    • Bidirectional buffered CEC line with integrated pull-up resistors (26 kΩ)
    • Hot plug detect pulse low on channel switch with programmable pulse width or direct manual control
    • Standards compatible: HDMI, DVI, HDCP, I2C
    • 80-pin 14 mm × 14 mm LQFP RoHS-compliant package
    • Front Panel Buffer: X
    • HDMI/DVI Input Channels: 4
    • HDMI/DVI Output Channels: 1
    • Input Equalization (dB): 18dB
    • Max Datarate (Gbps): 2.25Gbps
    • Max Resolution: 1080p/UXGA
    • Package: 80-LQFP

    Functional Block Diagram for ADV3002

    Part# HDMI/DVI Input Channels HDMI/DVI Output Channels Max Datarate (Gbps) Max Resolution Input Equalization (dB) Output Pre-Emphasis (dB) Front Panel Buffer Package
    AD8192 2 1 2.25 1080p/UXGA 12 6 X 56-LFCSP
    AD8194 2 1 2.25 1080p/UXGA 12 - X 32-LFCSP
    AD8195 1 1 2.25 1080p/UXGA 12 6 X 40-LFCSP
    AD8197B 4 1 2.25 1080p/UXGA 12 6 X 100-LQFP
    ADV3002 4 1 2.25 1080p/UXGA 18 - X 80-LQFP
    ADV3003 1 1 2.25 1080p/UXGA 12 6 - 40-LFCSP

    Pricing, Packaging & Availability

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    • Military : -55 to +125 degrees Celsius
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    • Automotive: -40 to +125 degrees Celsius
    Price
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    *The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.
    **Sample availability may be better than production availability. Please enter samples into your cart to check sample availability.