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AD9433:  12-Bit 105/125 MSPS Analog-To-Digital IF Sampling Converter

Product Details


The AD9433 is a 12-bit monolithic sampling analog-to-digital converter with an on-chip track-and-hold circuit and is designed for ease of use. The product operates up to 125 Msps conversion rate and is optimized for outstanding dynamic performance in wideband and high IF carrier systems.

The ADC requires a +5V analog power supply and a differential encode clock for full performance operation. No external reference or driver components are required for many applications. The digital outputs are TTL/CMOS compatible and a separate output power supply pin supports interfacing with 3.3V or 2.5V logic.

A user-selectable, on-chip proprietary circuit optimizes spurious-free dynamic range (SFDR) versus signal-to-noise-and-distortion (SINAD) ratio performance for different input signal frequencies, providing as much as 83 dBc SFDR performance over the dc to 70 MHz band.

The encode clock supports either differential or single-ended input and is PECL-compatible. The output format is user-selectable for binary or two's complement and provides an overrange (OR) signal.

Fabricated on an advanced BiCMOS process, the AD9433 is available in a 52-lead thin quad flat package (TQFP_EP) that is specified over the industrial temperature range of −40°C to +85°C. The AD9433 is pin-compatible with the AD9432.

FEATURES and BENEFITS

  • IF Sampling up to 350 MHz
  • SNR: 67.5 dB, fin up to Nyquist at 105 MSPS
  • SFDR: 83 dBc, fin = 70 MHz at 105 MSPS
  • SFDR = 72 dBc, fin = 150 MHz at 105 MSPS
  • 2 Vp-p analog input range
  • On-chip clock duty cycle stabilization
  • On-chip reference and track-and-hold
  • SFDR Optimization Circuit
  • Excellent Linearity
    DNL = ± 0.25 LSB (Typ)
    INL = ± 0.5 LSB (Typ)
  • 750 MHz full power analog bandwidth
  • Power Dissipation = 1.35W at 125 MSPS
  • Twos complement or offset binary data format
  • See data sheet for additional features

Functional Block Diagram for AD9433

Of Note ...

To drive this ADC in DC-coupled applications, we suggest ADA4938-1. To drive this ADC in AC-coupled applications, we suggest AD8352.

Documentation

Title Content Type File Type
AD9433: 12-Bit, 105 MSPS/125 MSPS, IF Sampling ADC Data Sheet (Rev A, 06/2009) (pdf, 989 kB) Data Sheets PDF
AN-282: Fundamentals of Sampled Data Systems  (pdf, 2131 kB) Application Notes PDF
AN-737: How ADIsimADC Models an ADC  (pdf, 373 kB) Application Notes PDF
AN-808: Multicarrier CDMA2000 Feasibility  (pdf, 1535 kB)
The goal of this application note is to determine the feasibility of implementing a multicarrier CDMA2000 transceiver and what the major subsystem performances must be.
Application Notes PDF
AN-905: VisualAnalog Converter Evaluation Tool Version 1.0 User Manual  (pdf, 2124 kB) Application Notes PDF
AN-935: Designing an ADC Transformer-Coupled Front End  (pdf, 363 kB) Application Notes PDF
AN-835: Understanding High Speed ADC Testing and Evaluation  (pdf, 985 kB) Application Notes PDF
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated  (pdf, 370 kB) Application Notes PDF
AN-345: Grounding for Low-and-High-Frequency Circuits  (pdf, 455 kB)
Know Your Ground and Signal Paths for Effective Designs. Current Flow Seeks Path of Least Impedance-Not Just Resistance....
Application Notes PDF
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter  (pdf, 291 kB) Application Notes PDF
AN-501: Aperture Uncertainty and ADC System Performance  (pdf, 227 kB)
A Key Concern in IF Sampling is that of Aperture Uncertainty (Jitter)
Application Notes PDF
UG-173: High Speed ADC USB FIFO Evaluation Kit (HSC-ADC-EVALB-DCZ)  (pdf, 774 kB) User Guides PDF
MS-2210: Designing Power Supplies for High Speed ADC  (pdf, 327 kB) Technical Articles PDF
High-speed ADCs: Preventing Front-end Collisions
Performance advances in communication technologies, imaging, instrumentation, and other data-dense applications critically depend on high-speed ADCs—the key link between computational resources and the real world. (EDN, 5/13/2004)
Technical Articles HTML
DNL and Some of its Effects on Converter Performance
... by Brad Brannon, Analog Devices, Inc. (Wireless Design & Development, June 2001)
Technical Articles HTML
Proper Grounding Is Critical For High-Speed Systems
... by Walt Kester and James Bryant, Analog Devices, Inc. (Wireless Systems Design, May 2000)
Technical Articles HTML
Correlating High-Speed ADC Performance to Multicarrier 3G Requirements
by Brad Brannon (RF Design, 6/1/2003)
Technical Articles HTML
RAQs index Rarely Asked Questions HTML
Glossary of EE Terms Glossary HTML

Design Tools,Models,Drivers & Software

Title Content Type File Type
ADIsimADC
ADIsimADC is Analog Devices' Analog-to-Digital Behavioral Model that accurately models the typical performance characteristics of many of our High Speed Converters. The model faithfully reproduces the errors associated with both static and dynamic features such as AC linearity, clock jitter, and many other product specific anomalies.
ADIsim Design/Simulation Tools HTML
AD9433 IBIS Models IBIS Models HTML

Evaluation Kits & Symbols & Footprints

Symbols and Footprints— Analog Devices offers Symbols & Footprints which are compatible with a large set of today’s CAD systems for broader and easier support.

SampleSample & Buy

Price, packaging, availability

AD9433 Model Options
Price Table Help

The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.


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