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AD9430:  12-Bit, 170/210 MSPS 3.3 V A/D Converter

Product Details

The AD9430 is a 12-bit monolithic sampling analog-to-digital converter optimized for high performance, low power, and ease of use. The product operates up to a 210 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) and reference are included on the chip to provide a complete conversion solution.

The ADC requires a 3.3 V power supply and a differential ENCODE clock for full performance operation. The digital outputs are TTL/CMOS or LVDS compatible and support either twos complement or offset binary format. Separate output power supply pins support interfacing with 3.3 V or 2.5 V CMOS logic.

Two output buses support demultiplexed data up to 105 MSPS rates in CMOS mode. A data sync input is supported for proper output data port alignment in CMOS mode and a data clock output is available for proper output data timing. In LVDS mode, the chip provides data at the ENCODE clock rate.

Fabricated on an advanced BiCMOS process, the AD9430 is available in a 100-lead surface-mount plastic package (100 e-PAD TQFP) specified over the industrial temperature range (-40°C to +85°C).


  • Wireless and Wired Broadband Communications
  • Cable Reverse Path
  • Communications Test Equipment
  • Radar and Satellite Subsystems
  • Power Amplifier Linearization


  • SNR = 65 dB @ Fin up to 70 MHz @
    210 MSPS
  • ENOB of 10.6 @ Fin up to 70 MHz @
    210 MSPS
  • SFDR = 80 dBc @ Fin up to 70 MHz @
    210 MSPS
  • Excellent Linearity:
    - DNL = ±0.3 LSB (Typical)
    - INL = ±0.5 LSB (Typical)
  • Two Output Data Options:
    - Demultiplexed 3.3 V CMOS Outputs Each @ 105 MSPS
    - Interleaved or Parallel Data Output Option
    - LVDS at 210 MSPS
  • 700 MHz Full Power Analog Bandwidth
  • Power Dissipation = 1.3 W Typical @ 210 MSPS
  • 1.5 V Input Voltage Range
  • 3.3 V Supply Operation
  • Output Data Format Option
  • Data Sync Input and Data Clock Output Provided
  • Clock Duty Cycle Stabilizer

Functional Block Diagram for AD9430

Of Note ...

To drive this ADC in DC-coupled applications, we suggest ADA4937-1 or ADA4938-1. To drive this ADC in AC-coupled applications, we suggest AD8352 or AD8375.


Title Content Type File Type
AD9430: 12-Bit, 170/210 MSPS 3.3 V A/D Converter Data Sheet  (Rev E, 09/2010) (pdf, 1789 kB) Data Sheets PDF
AN-1142: Techniques for High Speed ADC PCB Layout  (pdf, 392 kB) Application Notes PDF
AN-282: Fundamentals of Sampled Data Systems  (pdf, 2131 kB) Application Notes PDF
AN-737: How ADIsimADC Models an ADC  (pdf, 373 kB) Application Notes PDF
AN-807: Multicarrier WCDMA Feasibility  (pdf, 969 kB) Application Notes PDF
AN-808: Multicarrier CDMA2000 Feasibility  (pdf, 1535 kB)
The goal of this application note is to determine the feasibility of implementing a multicarrier CDMA2000 transceiver and what the major subsystem performances must be.
Application Notes PDF
AN-905: VisualAnalog Converter Evaluation Tool Version 1.0 User Manual  (pdf, 2124 kB) Application Notes PDF
AN-935: Designing an ADC Transformer-Coupled Front End  (pdf, 363 kB) Application Notes PDF
AN-835: Understanding High Speed ADC Testing and Evaluation  (pdf, 985 kB) Application Notes PDF
AN-586: LVDS Outputs for High Speed A/D Converters  (pdf, 207 kB)
High Speed ADCs Uses LVDS (Low-Voltage Differential Signaling) to Minimize Performance Limitations In ADC Applications When Providing High Speed Data Output
Application Notes PDF
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated  (pdf, 370 kB) Application Notes PDF
AN-345: Grounding for Low-and-High-Frequency Circuits  (pdf, 455 kB)
Know Your Ground and Signal Paths for Effective Designs. Current Flow Seeks Path of Least Impedance-Not Just Resistance....
Application Notes PDF
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter  (pdf, 291 kB) Application Notes PDF
AN-501: Aperture Uncertainty and ADC System Performance  (pdf, 227 kB)
A Key Concern in IF Sampling is that of Aperture Uncertainty (Jitter)
Application Notes PDF
AN-616: AD9430 Evaluation Board Modifications for XTAL Oscillator Clocking  (pdf, 162 kB) Application Notes PDF
AN-302: 02: Exploit Digital Advantages in an SSB Receiver  (pdf, 417 kB) Application Notes PDF
UG-173: High Speed ADC USB FIFO Evaluation Kit (HSC-ADC-EVALB-DCZ)  (pdf, 774 kB) User Guides PDF
Advanced Digital Post-Processing Techniques Enhance Performance in Time-Interleaved ADC Systems
by Mark Looney, Analog Devices, Inc. (Analog Dialogue, Vol. 37, June 2003)
Analog Dialogue HTML
MS-2210: Designing Power Supplies for High Speed ADC  (pdf, 327 kB) Technical Articles PDF
Design A Clock-Distribution Strategy With Confidence
by Demetrios Efstathiou (Electronic Design, April 27, 2006)
Technical Articles HTML
Proper Grounding Is Critical For High-Speed Systems
... by Walt Kester and James Bryant, Analog Devices, Inc. (Wireless Systems Design, May 2000)
Technical Articles HTML
LVDS Ups A/D Converter Data Rates
... Over time, sample rates in analog-to-digital converters have increased steadily, thanks to some of the same technology improvements that have increased the speed and density of digital ICs.
(EE Times, October 7, 2002)
Technical Articles HTML
Correlating High-Speed ADC Performance to Multicarrier 3G Requirements
by Brad Brannon (RF Design, 6/1/2003)
Technical Articles HTML
DNL and Some of its Effects on Converter Performance
... by Brad Brannon, Analog Devices, Inc. (Wireless Design & Development, June 2001)
Technical Articles HTML
ADI Raises the Speed Bar on 12-Bit A/D
(EE Times, 6/27/2002)
Product Reviews HTML
RAQs index Rarely Asked Questions HTML
Glossary of EE Terms Glossary HTML

Design Tools,Models,Drivers & Software

Title Content Type File Type
ADIsimADC is Analog Devices' Analog-to-Digital Behavioral Model that accurately models the typical performance characteristics of many of our High Speed Converters. The model faithfully reproduces the errors associated with both static and dynamic features such as AC linearity, clock jitter, and many other product specific anomalies.
ADIsim Design/Simulation Tools HTML
AD9430 IBIS Models IBIS Models HTML

Evaluation Kits & Symbols & Footprints

Symbols and Footprints— Analog Devices offers Symbols & Footprints which are compatible with a large set of today’s CAD systems for broader and easier support.

SampleSample & Buy

Price, packaging, availability

AD9430 Model Options
Model Package Pins Temp.
Price*(100-499) Price*1000 pcs RoHS View PCN/ PDN Check Inventory/
AD80142BSVZ-200 Status: Production 100 ld TQFP-ED(w/ 6.5mm exposed pad) 100 Ind Tray, 90 - - Y  Material Info PCN Contact ADI
AD9430BSVZ-170 Status: Production 100 ld TQFP-ED(w/ 6.5mm exposed pad) 100 Ind Tray, 90 $47.05 $39.97 Y  Material Info PCN Purchase
AD9430BSVZ-210 Status: Production 100 ld TQFP-ED(w/ 6.5mm exposed pad) 100 Ind Tray, 90 $65.51 $55.66 Y  Material Info PCN Purchase
Price Table Help

The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.

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