ADN2812

PRODUCTION

Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp

Data Sheet (Rev. E) Product Selection Table

Part Models: 2
1ku List Price: Starting From $79.51

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Overview

Serial data input: 12.3 Mb/s to 2.7 Gb/s
Exceeds SONET requirements for jitter transfer/ generation/tolerance
Quantizer sensitivity: 6 mV typical
Adjustable slice level: ±100 mV
Patented clock recovery architecture
Loss of signal (LOS) detect range: 3 mV to 15 mV
Independent slice level adjust and LOS detector
No reference clock required
Loss of lock indicator
I²C interface to access optional features
Single-supply operation: 3.3 V
Low power: 750 mW typical

The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for −40°C to +85°C ambient temperature, unless otherwise noted.

This device, together with a PIN diode and a TIA preamplifier, can implement a highly integrated, low cost, low power fiber optic receiver.

The receiver front end, loss of signal (LOS) detector circuit indicates when the input signal level has fallen below a user-adjustable threshold. The LOS detect circuit has hysteresis to prevent chatter at the output.

The ADN2812 is available in a compact 5 mm × 5 mm 32-lead lead frame chip scale package (LFCSP).

Applications

SONET OC-1/OC-3/OC-12/OC-48 and all associated FEC rates
Fibre Channel, 2× Fibre Channel, GbE, HDTV
WDM transponders
Regenerators/repeaters
Test equipment
Broadband cross-connects and routers

Part Models: 2
1ku List Price: Starting From $79.51

Documentation

Data Sheet 1

ADN2812: Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp Data Sheet (Rev.E) 11/16/2006

Application Note 4

AN-757: Acquisition Times of the ADN2812 (Rev.0) 11/30/2004

AN-657: ADN2812 Evaluation Board (Rev.A) 10/03/2003

AN-632: Provisionary Data Rates Using the AD9951 DDS as an Agile Reference Clock for the ADN2812 Continuous-Rate CDR (Rev.0) 09/25/2003

AN-746: Supporting FDDI with the ADN2812 (Rev.0) 10/14/2005

Frequently Asked Question 1

FAQ 09/05/2025

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.

Part Model	Pin/Package Drawing	Documentation	CAD Symbols, Footprints, and 3D Models
ADN2812ACPZ	32-Lead LFCSP (5mm x 5mm)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
ADN2812ACPZ-RL7	32-Lead LFCSP (5mm x 5mm)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys

Part Models	Product Lifecycle	PCN

Mar 23, 2012 - 11_0104 Conversion of Select Sizes of LFCSP Package Outlines from Punch to Sawn and Transfer of Assembly Site to ASE-Korea.
		PCN11_0104_Form Material_Report Qualification Report Summary Detailed Change Description Detailed Change Description Package Outline Drawing
ADN2812ACPZ	PRODUCTION
ADN2812ACPZ-RL7	PRODUCTION