AD14060

Obsolete

480-MFLOP, Quad DSP, 5 V, CQFP Package

Data Sheet (Rev. B)
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Overview

  • ADSP-21060 core processor(x4)
  • 480 MFLOPS peak, 320 MFLOPS sustained
  • 25 ns instruction rate, single-cycle instruction execution-each of four processors
  • 16 Mbit shared SRAM (internal to SHARCs)
  • 4 gigawords addressable off-module memory
  • Twelve 40 Mbyte/s link ports (3 per SHARC)
  • Four 40 Mbit/s independent serial ports (one from each SHARC)
  • One 40 Mbit/s common serial port
  • 5 V and 3.3 V operation
  • 32-bit single precision and 40-bit extended precision IEEE floating point Data formats, or 32-bit fixed point data format
  • IEEE JTAG Standard 1149.1 test access port and on-chip emulation

The AD14060/AD14060L Quad-SHARC is the first in a family of high performance DSP multiprocessor modules. The core of the multiprocessor is the ADSP-21060 DSP microcomputer. The AD14060/AD14060L modules have the highest performance —density and lowest cost—performance ratios of any in their class. They are ideal for applications requiring higher levels of performance and/or functionality per unit area.

AD14060
480-MFLOP, Quad DSP, 5 V, CQFP Package
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Documentation

Data Sheet 2

Technical Articles 2

Cross Reference Guide 4

Software Manual 1

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Software Resources

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