Introduction

The LTC3853 is a versatile 3-phase synchronous buck controller with on-chip drivers in a 6mm × 6mm QFN package. While each channel can independently deliver currents in excess of 15A, two of the channels can be combined for twice the current, with their relative operating phase automatically optimized to reduce output ripple. Channels 1 and 2 can be programmed for outputs from 0.8V to 5V, while channel 3 can support outputs from 0.8V to 13.2V.

Multiphase Operation

The LTC3853 can be configured for three single phase outputs, or for two outputs with channels 1 and 2 tied together. In a 3-output setup, the switches operate 120° out of phase, reducing the input RMS ripple current and minimizing the input capacitance requirement.

Dual Output Converter with 2 + 1 Operation

Figure 1 shows a 2-output converter working from a 14V to 24V input. Channels 1 and 2 feed the same 1.8V output, while channel 3 controls a second 12V output. This 2 + 1 mode requires just one RUN pin (RUN1) to enable both channels 1 and 2. The error amp of channel 2 is disabled and both channels share channel 1’s feedback divider. Post package trimming of the current sense comparators provides excellent current sharing between channels 1 and 2, as the load step of Figure 2 shows. Channels 1 and 2 run 180° out of phase to minimize the output ripple on their 2-phase single output. A minimum on-time of <90 nanoseconds allows low duty cycle operation even at high frequencies—at 24V_IN to 1.8V_OUT, this 500kHz regulator never misses a pulse.

The EXTV_CC pin can be connected to a 5V supply to power the internal MOSFET drivers and control circuits. An internal switch connects EXTV_CC to INTV_CC with a typical voltage drop of just 50mV. If EXTV_CC is not connected, the LTC3853’s internal regulator uses the main input supply, V_IN, to provide 5V to the internal circuitry and drivers at INTV_CC. In either case, the switching frequency is set with a divider from the predictable 5V at INTV_CC, with 1.2V at the FREQ pin corresponding to free-running 500kHz. If an external frequency source is available, a phase locked loop enables the LTC3853 to sync with frequencies between 250kHz and 750kHz.

The LTC3853 can be set to operate in one of three modes under light load conditions. Burst Mode operation offers the highest light load efficiency by switching in a “burst” of one to several pulses replenishing the charge stored in the output capacitors, followed by a long sleep period when the load current is supplied by the output capacitors. Forced continuous mode offers fixed frequency operation from no load to full load, providing the lowest output voltage ripple at the cost of light load efficiency. Pulse-skipping mode operates by preventing inductor current reversal by turning off the synchronous switch as needed. This mode is a compromise between the other two modes, offering lower ripple than Burst Mode operation and better light load efficiency than forced continuous mode. Regardless of the mode selected, the LTC3853 operates in constant frequency mode at higher load currents. Figure 3 shows the efficiency in each of the three modes.

Each of the LTC3853’s channels can be enabled with its own RUN pin, or slewed up or down with its own TRACK/SS pin. Tracking holds the feedback voltage to the lesser of the internal reference voltage or the voltage on TRACK/SS, which can be brought up with an external ramp or with its own 1.2µA internal current source. With all of the TRACK/SS pins held low and any output enabled through its RUN pin, the 5V INTV_CC is still available for ancillary keep-alive circuits.

Pulse-skipping mode is always enabled at start-up to prevent sinking current from a pre-biased output voltage. When the output reaches 80% of the set value, the part switches over to forced continuous mode until the output has entered the POWER GOOD window, at which point it switches over to the selected mode of operation. Forced continuous mode reduces the output ripple as the power good threshold is crossed, to ensure that the POWER GOOD indicators make just one low to high transition.

Three different max current comparator sense thresholds can be set via the ILIM pin. The current is sensed using a high speed rail-to-rail differential current sense comparator. The circuit of Figure 1 uses accurate sense resistors between the inductors and the outputs. For reduced power loss at high load currents, the LTC3853 can also monitor the parasitic resistance of the inductor (DCR sensing). Peak inductor current is limited on a cycle-by-cycle basis and is independent of duty cycle. If load current is high enough to cause the feedback voltage to drop, current limit fold back protects the power components by reducing the current limit. For predictable tracking, current limit fold back is disabled during start-up. Input undervoltage lockout, output overvoltage shutdown and thermal shutdown also protect the power components and the IC from damage.

Conclusion

The LTC3853’s small footprint belies its versatility and extensive feature set. From inputs up to 24V it can regulate three separate outputs, or it can be configured for higher currents by tying channels 1 and 2 together. Either way, the phase relationship between channels is automatically optimized to reduce ripple currents. At low duty cycles, the short minimum on-time ensures constant frequency operation, and peak current limit remains constant even as duty cycle changes. The cost-effective LTC3853 incorporates these features, and more, into a 40-pin 6mm × 6mm QFN package.