よくある質問(FAQ)

What is the difference between the DREQ/DACK and DCS DMA modes?

Both DREQ/DACK mode and dedicated chip select (DCS) are DMA modes. DCS mode allows more control of the data through the FFTHRC register, since DREQ/DACK modes are fixed to single or the programmed burst sizes.

In DREQ/DACK DMA mode, the DREQ/ asserts as soon as sufficient data is present to fullfill the DMA burst or DMA single access settings in the EDMOD registers. DREQ/ assert should be answered with an DACK/ assert from the host processor.

DREQ/DACK mode and DCS mode require the DREQ/ and DACK/ pins. However, the functionality of these pins is slightly different in the two modes.

In DREQ/DACK DMA mode, DREQ/ is asserted as soon as sufficient data is present to fullfill the DMA burst or DMA single access settings in the EDMOD register. An assertion of DREQ/ should be answered from the host processor by an assertion of DACK/.
In DCS mode, DREQ/ is asserted as long as there is data greater than or equal to the threshold value in the FIFO to be read out (in encode) or as long as there is space available greater than or equal to the threshold value in the FIFO (in decode). Accesses to data require the DACK/ pin to be asserted with RD/ or WE/.

See the ADV212 Programming Guide for more information on DREQ/DACK and DCS DMA modes. See the ADV212 User's Guide for more information on the threshold registers.