Optimize Cost, Size, and Performance with MAX98357 WLP

PDFをダウンロード

要約

This application note provides recommendations for the inner bump connection of the MAX98357A/B WLP package to minimize PCB fabrication cost and describe the recommended use of the GAIN_SLOT pin.

Although the MAX98357A/MAX98357B are available in two space-saving packages (9-bump WLP (1.44mm x 1.35mm, 0.4mm pitch) and 16-pin TQFN (3mm x 3mm)), choosing which package to use in your end-product depends on your budget and the available space on your PCB. Additionally, as the device package gets smaller, the routing of traces out from the device can become more complex, thereby increasing PCB fabrication cost. This is where the WLP vs. the TQFN is more appealing. The WLP’s primary PCB routing concern is the connection of the inner bump (GAIN_SLOT). This application note focuses on the WLP package and some PCB design recommendations that can reduce your overall design-in cost. Figure 1 shows the WLP pinout.

Figure 1. MAX98357A/MAX98357B.

Figure 1. MAX98357A/MAX98357B.

Function of GAIN_SLOT Pin

With I2S input data, the GAIN_SLOT pin is used to set the system gain. With TDM input data, the gain is fixed at 12dB and the GAIN_SLOT pin is used to select which channel of audio to decode.

Table 1. Gain Selection
GAIN_SLOT I2S/LJ GAIN (dB)
Connect to GND through 100kΩ ±5% resistor 15
Connect to GND 12
Unconnected 9
Connect to VDD 6
Connect to VDD through 100kΩ ±5% resistor 3
Table 2. TDM Mode Channel Selection
SD_MODE GAIN_SLOT CHANNEL BITS
Low X Off N/A
VDD GND 0 16/32
VDD VDDwith 0Ω 1 16/32
VDD Float 2 16/32
VDD VDDwith 100Ω 3 16/32
VDD GND with with 100Ω 4 16/32
VDD through RLARGE GND 5 16/32
VDD through RLARGE Float 6 16/32
VDD through RLARGE VDD 7 16/32

The intended use for GAIN_SLOT is to fix the desired full-scale output (I2S mode) or channel selection (TDM mode). In any operation case, it is not intended for the GAIN_SLOT pin to be changed while audio is playing as it could result in audible clicks or pops.

It is suggested that volume control be implemented digitally where the audio is generated. Doing so allows a more precise volume control than what is possible by adjusting the GAIN_SLOT pin. The digital implantation also avoids a new route for the GAIN_SLOT pin.

Maxim's patented Dynamic Range Extension (DRE) allows the user to achieve the best dynamic range and noise floor at any gain setting. By using a dynamic range extender, one can avoid use cases where the user would normally reduce the analog gain to maximize dynamic range and noise floor. Full details of DRE and its benefits can be found in the white paper Designing Better, Simpler Audio Solutions with Dynamic Range Enhancement (DRE).

Use Cases Where GAIN_SLOT Does Not Need to Be Routed Out

As shown in Table 1, the GAIN_SLOT pin is used to select the gain for I2S mode. Three of the five gains do not need to be routed out. This is possible because of its placement in relation to VDD and GND. With I2S data, the pin can be configured for 6dB, 9dB, and 12dB.

Here are sample layouts (Figure 2a, 2b, 2c):

Figure 2a. 6dB (GAIN_SLOT tied to VDD).

Figure 2a. 6dB (GAIN_SLOT tied to VDD).

Figure 2b. 9dB (GAIN_SLOT Unconnected).

Figure 2b. 9dB (GAIN_SLOT Unconnected).

Figure 2c. 12dB (GAIN_SLOT tied to GND).

Figure 2c. 12dB (GAIN_SLOT tied to GND).

Similarly, in TDM mode, channels 0, 1, 2, 5, 6, and 7 can be selected without routing out the GAIN_SLOT pin by tying the pin to GND, VDD, or leaving it unconnected. That means six of the eight channels in 8-channel TDM mode do not require routing out GAIN_SLOT.

Use Cases Where GAIN_SLOT Must Be Routed Out

If using I2S mode with +3dB or +15dB gain, it is required to route the GAIN_SLOT pin so that a 100kΩ resistor can be connected to either VDD or GND. This is also true for using channels 3 or 4 in TDM mode.

Options for Routing GAIN_SLOT Pin

If the use case requires routing out the GAIN_SLOT pin, here are the options:

  • Mechanically drilled via: cheaper if PCB volumes are low
  • Laser-drilled alternative: cheaper if PCB volumes are high
  • Blind and buried vias with dog-boning
  • Trace on the top layer: this will be a minimal pitch trace

PCB fabrication technology is constantly evolving, so check with your PCB manufacturer to see what option may work best for your design.