AN-2505: Precision Weigh Scale Design Using the AD7191 24-Bit Sigma-Delta ADC with Internal PGA

Circuit Function and Benefits

The circuit shown in Figure 1 is a weigh scale system that uses the AD7191. The AD7191 is a pin programmable, low noise, low drift, 24-bit Σ-Δ converter that includes a PGA and uses an internal clock. Therefore, the device simplifies the weigh scale design because most of the system building blocks are included on chip. The device has four output data rates and four gain settings that are selected using dedicated pins. This simplifies the interface to the ADC.

Circuit Description

Since the AD7191 provides an integrated solution for weigh scales, it interfaces directly to the load cell. The only external components required are some filters on the analog inputs and capacitors on the reference pins for EMC purposes. The low level signal from the load cell is amplified by the AD7191's PGA. The PGA is programmed to operate with a gain of 128. The conversions from the AD7191 are then sent to the microcontroller where the digital information is converted to weight and displayed on the LCD.

Figure 2 shows the actual test setup. A 6-wire load cell is used, as this gives the optimum system performance. A 6-wire load cell has two sense pins in addition to the excitation, ground, and two output connections. These sense pins are connected to the high side and low side of the Wheatstone bridge. The voltage developed across the bridge can, therefore, be accurately measured. In addition, the AD7191 has differential analog inputs and accepts a differential reference. Connection of the load cell differential SENSE lines to the AD7191 reference inputs creates a ratiometric configuration that is immune to low frequency changes in the power supply excitation voltage. With a 4-wire load cell the sense pins are not present, and the ADC reference pins are connected to the excitation voltage and ground. With this arrangement, the system is not completely ratiometric because there will be a voltage drop between the excitation voltage and SENSE+ due to wiring resistance. There will also be a voltage drop due to wire resistance on the low side.

The AD7191 has separate analog and digital power supplies. The digital power supply is independent of the analog power supply, and it can equal any voltage between 2.7 V and 5.25 V. The microcontroller uses a 3.3 V power supply. Therefore, DVDD is also powered from 3.3 V. This simplifies the interface between the ADC and the microcontroller because no external level shifting is required.

There are several methods to power the weigh scale system. It can be powered from the mains power supply or battery powered (as shown in Figure 1). A 5 V low noise regulator is used to ensure that the AD7191 and the load cell receive a low noise supply. A low noise ADP3303 (5 V) regulator is used to generate the 5 V supply.

The filter network shown inside the dotted box ensures a low noise AVDD for the system. In addition, noise reduction capacitors are placed on the regulator output as recommended in the ADP3303 (5 V) data sheet. To optimize the EMC performance, the regulator output is filtered before being supplied to the AD7191 and the load cell. The 3.3 V digital supply is generated using the ADP3303 (3.3 V). It is essential that low noise regulators are used to generate all the power supply voltages to the AD7191 and the load cell, as any noise on the power supply or ground planes will introduce noise into the system and degrade the circuit performance.

If a 2 kg load cell with a sensitivity of 2 mV/V is used, the full-scale signal from the load cell is 10 mV when the excitation voltage is 5 V. A load cell has an offset or TARE associated with it. This TARE can have a magnitude that is up to 50 % of the load cell’s full-scale output signal. The load cell also has a gain error that can be up to ±20% of full scale. Some customers use a DAC to remove or null the TARE. When the AD7191 uses a 5 V reference, its analog input range is equal to ±40 mV when the gain is set to 128. The wide analog input range of the AD7191 relative to the load cell full-scale signal (10 mV) is beneficial, as it ensures that the offset and gain error of the load cell do not overload the ADC’s front-end.

The AD7191 has an rms noise of 15 nV when the output data rate is 10 Hz. The number of noise-free counts is equal to

where the factor of 6.6 converts the rms voltage to a peak-to-peak voltage.

The resolution in grams is, therefore, equal to

and the noise-free code resolution is equal to

In practice, the load cell itself will introduce some noise. There also will be some drift due to time and temperature due to the load cell along with the AD7191’s drift. To determine the accuracy of the complete system, the weigh scale can be connected to the PC via the USB connector. Using LabView software, the performance of the weigh scale system can be evaluated. Figure 3 shows the measured output performance when a 1 kg weight is placed on the load cell and 500 conversions are gathered. The noise of the system is calculated by the software to be 17 nV rms and 98 nV peak-to-peak. This equates to 102,000 noise-free counts or 16.6 bits of noise-free code resolution.

Figure 4 shows the performance in terms of weight. The peak-to-peak variation in output is 0.02 grams over the 500 codes. Therefore, the weigh scale system achieves an accuracy of 0.02 grams.

The plots show the actual conversions being read back from theAD7191 when the load cell is attached. In practice, a digital post filter is used in a weigh scale system. The additional averaging that is performed in the post filter will further improve the number of noise-free counts at the expense of a reduced data rate.