# AN-1024: How to Calculate the Settling Time and Sampling Rate of a Multiplexer

### Introduction

This application note describes how to calculate the settling time of a switch and a multiplexer switch. It also discusses how to calculate the maximum sampling rate for a multiplexer.

### Calculating The Settling Time Of A Switch Or Multiplexer

A rudimentary way of calculating how long a switch or multiplexer takes to settle can be estimated by calculating the RC for the device, that is, R_{ON} × C_{D}, and multiplying by the number of time constants for required system accuracy. This is added to the switch timing, T_{ON}, T_{OFF}, or T_{TRANSITION}, for the switch or multiplexer.

*Time to Settle = Switching Timing + (RON × CD × No. of Time Constants)*

where:

RON is the switch on resistance.

CD is the switch drain capacitance.

No. of Time Constants = −ln (% error/100).

The settling time can be calculated because the response is a function of the switch and circuit resistances and capacitances. One can assume that this is a single-pole system and calculate the number of time constants required to settle to the desired system accuracy as shown in Table 1.

Resolution, No. of Bits | LSB (%FS) | No. of Time Constants = −ln (% Error/100) |

6 | 1.563 | 4.16 |

8 | 0.391 | 5.55 |

10 | 0.0977 | 6.93 |

12 | 0.0244 | 8.32 |

14 | 0.0061 | 9.70 |

16 | 0.00153 | 11.09 |

18 | 0.00038 | 12.48 |

20 | 0.000095 | 13.86 |

22 | 0.000024 | 15.25 |

The switch dynamic transfer function is shown in Figure 1. This shows a single switch channel in a typical application setup and the key parameters that come into effect during switching. The equations for calculating the settling time for a switch when going from the on-to-off position and the off-to-on position are shown in Figure 1.

The settling time of a multiplexer is calculated in the same way as that of a switch, except that the multiplexer transition time is used instead of T_{ON}/T_{OFF} as in the case of a switch (see Formula A).

#### Formula A

*T _{SETTLE MUX} = T_{TRANSITION} + [(R_{ON} × R_{LOAD}/R_{ON} + R_{LOAD}) × (C_{LOAD} + C_{D}) × (No. of Time Constants)]*

The settling time of the ADG1208 to 10-bit accuracy for a typical application setup is now calculated using Formula A.

*T _{SETTLE MUX} = T_{TRANSITION} + [(R_{ON} × R_{LOAD}/R_{ON} + R_{LOAD}) × (C_{LOAD} + C_{D}) × (No. of Time Constants)]*

Thus, using the typical data sheet specification at ±15 V supply

*R _{ON} *= 120 Ω

*C _{D (OFF)} *= 6 pF

And application parameters of

*R _{LOAD}* = 1 kΩ

*C _{LOAD}* = 5 pF

*T _{SETTLE MUX} = T_{TRANSITION} + [(R_{ON} × R_{LOAD}/R_{ON} + R_{LOAD}) × (C_{LOAD} + C_{D}) × (No. of Time Constants)]*

*T _{SETTLE MUX}* = 80 ns + [(120 × 1000/120 + 1000) × (5 pF + 6 pF) × (6.93)]

*T _{SETTLE MUX}* = 80 ns + 8.2 ns

*T _{SETTLE MUX}* = 88 ns

### Calculating The Maximum Sampling Rate For A Multiplexer

Formula B is used to calculate the maximum sampling rate of a multiplexer, f_{S}.

#### Formula B

*f*_{S} = 1/[(T_{SETTLE MUX}) (No. of channels)]

where *T _{SETTLE MUX}* is calculated using Formula A.

Thus, for the ADG1208, where

*T _{SETTLE MUX}* = 88 ns

*No. of Channels* = 8

this gives a maximum sampling rate of

*f*_{S} = 1/[(88 ns) (8)] = 1.4 MSPS

### Calculating The Settling Time Of A Switch Or Multiplexer Using The Online Settling Time Calculator

A switch/multiplexer settling time calculator is available on the Analog Devices, Inc. website.

This calculator estimates the settling time for a multiplexer by calculating the slower of the two time constants for a cascaded RC network, and then computing how many of that time constant must pass before the system settles to within 1%, 0.1%, 0.01%, and 0.001% of its final value.

Note that the online settling tool calculates settling time as RC × the number of time constants. It does not include the switching timing (T_{ON}, T_{OFF}, or T_{TRANSITION}).

To use the calculator, enter the multiplexer parameters in R_{ON} (switch or multiplexer on resistance), C_{S(OFF)} (source off capacitance), and C_{D(OFF)} (drain off capacitance).

Enter the application parameters in R_{SOURCE}, R_{LOAD} and C_{LOAD}. Tab from one field to the other to update the tabular display or click **Calculate**.

As an example, the online tool can be used to calculate the settling time of the ADG1208 multiplexer. Again, the typical data sheet specification at ±15 V supply is used for this example.

*R _{ON}* = 120 Ω

*C _{S (OFF)}* = 1.5 pF

*C _{D (OFF)}* = 6 pF

With application parameters of

*R _{SOURCE}* = 0 Ω

*R _{LOAD}* = 1 kΩ

*C _{LOAD}* = 5 pF

This gives a settling time of 9 ns if settling to 10-bits of accuracy, as shown in Figure 3.

As mentioned, the calculator does not include the switch timing (T_{ON}, T_{OFF}, or T_{TRANSITION}) in the settling time calculation, it just calculates based on the RC for the system times the number of time constants. Accounting for the switch timing gives very similar results as those given by Formula A.

### Calculating Maximum Sampling Rate For A Multiplexer Using The Online Calculator

The online settling calculator also estimates the maximum sampling rate possible for a classic ADC with S/H input. The sampling rate is estimated as 1/sqrt.

[(T_{SETTLE}+T_{TRANSITION}) 2 + t_{PGA}^{2} ]

This number should be less than the sum of t_{ACQ} + t_{CONV} for the ADC; otherwise, the maximum sampling frequency is limited by the latter. The maximum sampling frequency estimate is shown in megasamples/sec to the right of the settling time number, as shown in Figure 3.

This online tool gives the maximum sampling rate for a single multiplexer channel. If you require the maximum sampling rate for all channels on the multiplexer being switched, then divide the sample rate given by the calculator by the number of channels being switched. As shown in Figure 3, the calculator gives a maximum sampling rate for the ADG1208 of 11.24 MSPS. This is based on switching just one channel. If all eight channels of the ADG1208 need to be switched, then this number should be divided by 8; 11.24MSP/8 = 1.4 MSPS sampling rate for eight channels of the ADG1208, settling to 10 bits. Again, this gives the same result as when using Formula B.