AD9551 Schematics (Rev. D)6/5/2009
- Simple power connection using USB connection and on-board LDO voltage regulators
- LDOs are easily bypassed for power measurements
- AC-coupled differential LVPECL SMA connectors
- SMA connectors for
2 reference inputs
2 PLL lock detect outputs
- Microsoft Windows®–based evaluation software with simple graphical user interface
- On-board PLL loop filter
- Easy access to digital I/O and diagnostic signals via I/O header
- Status LEDs for diagnostic signals
- USB computer interface
- Dip switch configurable for manual operation
- Software calculator provides flexibility, allowing programming almost any rational input/output frequency ratio
The AD9551 Revision D evaluation board is a compact, easy to use platform for evaluating all features of the AD9551 multiservice clock generator.
The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended and differential operation. Reference conditioning and switchover circuitry internally synchronizes the two references so that if one reference fails, there is virtually no phase perturbation at the output.
The AD9551 uses an external crystal and an internal DCXO to provide for holdover operation. If both references fail, the device maintains a steady output signal. This may mislead you to believe that the PLL is locked and the board is configured properly. A simple test is to move the input REF A or REF B clock a few kilohertz and verify that the changes in output frequency track the input.