The LTM8001 is a µModule regulator that combines a 5A switching regulator with an array of five 1.1A low noise LDOs. The switching regulator can be set for constant current, suitable to charge supercapacitors for power backup. The LTM8001 operates from 6V to 36V inputs. The switching regulator is capable of constant output voltage or constant output current regulation at switching frequencies from 200kHz to 1MHz. The output of the switching regulator can be adjusted from 1.2V to 24V and the outputs of the LDOs are adjustable from 0V to 24V.
The switching regulator is set to regulate output current at 5.6A (typical) to provide a current limit that is above the maximum output current of 5A. The regulated current level can be easily lowered. The inputs for three of the LDOs are hardwired to the output of the switching regulator, but the input to the remaining bank of two LDOs is undedicated, so it can be connected to the switching regulator or elsewhere. The bias inputs to the LDOs are undedicated but are separated into two inputs: one for the bank of three connected to the switching regulator and the other for the remaining bank of two LDOs. The outputs of the LDOs can be operated separately or paralleled for higher output currents.
2-Output Regulator With Supply Ride-Through Supercapacitor
Figure 1 shows the LTM8001 in a dual output application: 3.3V at 1A and 2.5V at 0.5A. This setup also charges a supercapacitor and draws on the supercap to support the outputs in the face of input supply failures.
The switching frequency is 600kHz and the output voltage of the switching regulator is 5V when the supercapacitor is fully charged. The input voltage is from 9V to 15V and the LTM8001 charges the supercapacitor at 5.6A, typical. The resistor divider on the RUN pin programs the circuit to turn on for a 9V or higher input, but also ensures that the switching regulator remains off when back-fed by the supercapacitor when there is an interruption to the input power.
Figure 2 shows LDO VBIAS-to-output dropout voltage vs output current. According to Figure 2, the bias of the higher voltage, 3.3V/1A LDO output must be 1.5V higher than 3.3V, or 4.8V for proper regulation. This means that the LDO outputs remain in regulation during the time the supercapacitor voltage decays 100mV from 4.9V to 4.8V. The 0.07Ω ESR of the PM-5R0V155-R supercapacitor reduces the available voltage from the supercapacitor from 5V to 4.9V while the supercapacitor provides 1.5A to the LDOs. If the supercapacitor is 1.5F and the total output current of the LDOs is 1.5A, the holdup time for the 3.3V LDO output is:
Both the LDO bias and LDO input power are connected to 5V from the supercapacitor. Although 5V is non-optimal with regard to power dissipation, it maximizes holdup time if the input supply fails. Power loss is minimized by operating the LDO with inputs that just meet, and do not exceed, the bias dropout requirements of the 3.3V LDO. But the supercapacitor voltage must exceed the input power dropout requirement to meet bias dropout and holdup requirements. To mitigate this increased power dissipation, the LTM8001 parallels LDOs to distribute heat and lower operating temperatures.
Holdup time is longer when the supercapacitor provides bias to the LDOs compared to using a conventional capacitor for that purpose. This avoids detrimental effects of charging a large capacitor directly with the input voltage. Figure 3 shows that the 3.3V output holdup time exceeds 100ms when the supercapacitor is charged to 5V and the LDO outputs are 3.3V at 1A and 2.5V at 0.5A.
The LTM8001 makes it easy to design a multiple output voltage regulator circuit featuring supercapacitor backup power. It is possible to achieve significant holdup time without adding large and undesirable capacitance directly to input power.
Visit www.analog.com/LTM8001 for data sheets, demo boards and other applications information.