### Abstract

This application note details a step-by-step design process for the MAX16833 high-voltage high-brightness LED driver. This process can speed up prototyping and increase the chance for first-pass success. A typical design scenario is presented, along with example calculations based on the design constraints. Component selection trade-offs are discussed. A spreadsheet calculator is included to help calculate external component values. This application note focuses on the boost converter topology. However, the same process can be applied to other topologies as long as the underlying equations are understood. For a buck-boost converter design example, see application note 5659, “Step-by-Step Design Process for the MAX16833 High-Voltage High-Brightness LED Driver, Part 2.”

### Introduction

*Figure 1. Typical operating circuit.*

### Inductor Selection (Boost)

(Eq. 1) |

_{LED}is the forward voltage of the LED string in volts, V

_{D}is the forward drop of the rectifying diode (approximately 0.6V), V

_{INMIN}is the minimum input-supply voltage in volts, and V

_{FET}is the average drain-to-source voltage of the switching MOSFET in volts when it is on (assume 0.2V initially).

(Eq. 2) |

(Eq. 3) |

_{L}is the peak-to-peak inductor current ripple in amperes.

(Eq. 4) |

(Eq. 5) | |

(Eq. 6) | |

(Eq. 7) | |

(Eq. 8) |

_{MIN}as possible without going under. Recalculate the peak inductor current and ripple using the chosen inductor value. These numbers are necessary for additional calculations going forward.

(Eq. 9) | |

(Eq. 10) | |

(Eq. 11) |

_{P}. Typically, 20% headroom is used for inductor peak current.

### Input Capacitor Selection

(Eq. 12) |

_{Q_IN}is the portion of input ripple due to the capacitor discharge.

(Eq. 13) |

_{ESR_IN}is the input ripple due to ESR.

_{INMIN}). Also, assume that 95% of this input ripple comes from the bulk capacitance. This assumption may need to be revisited if the calculated values are not easily attained with actual components. Based on the stated design specifications, the input capacitor is calculated as follows:

(Eq. 14) | |

(Eq. 15) |

*at the operating voltage*(capacitance can decrease substantially with a change in voltage in ceramic capacitors).

### Output Capacitor Selection

(Eq. 16) |

_{Q_OUT}is the portion of output ripple due to the capacitor discharge.

_{ESR_OUT}, comes from the output capacitor ESR, which can be calculated as follows:

(Eq. 17) |

^{1}

_{LED}. Also, assume that the dynamic impedance of the chosen LED is 0.2Ω (1.4Ω total for the 7 LED string). The total output voltage ripple is then calculated as follows:

V_{OUTRIPPLE} = 0.1A × 1.4Ω = 140mV |
(Eq. 18) |

(Eq. 19) | |

(Eq. 20) |

*at the operating voltage*(capacitance can decrease substantially with a change in voltage in ceramic capacitors).

### Overvoltage Protection

_{OVP}exceeds 1.23V, NDRV is forced low until V

_{OVP}discharges to 1.16V.

(Eq. 21) |

_{OV}of 42V is acceptable. Choose R

_{OVP2}to be 10kΩ, then

(Eq. 22) |

### Current Sensing

### LED Current Sensing

_{ICTRL}> 1.23V, the internal reference regulates the voltage across R

_{CS_LED}(V

_{ISENSE+}- V

_{ISENSE-}) to 200mV. Therefore, the current-sense resistor R

_{CS_LED}sets the LED current.

(Eq. 23) |

_{ICTRL}< 1.23V, then the LED current is determined by R

_{CS_LED}and V

_{ICTRL}. This allows the LEDs to be dimmed with an analog voltage.

(Eq. 24) |

_{ICTRL}= 1.23V, both equations are the same.

_{CS_LED}is also used to detect a short circuit across the LED string. If the voltage across ISENSE+ and ISENSE- exceeds 300mV for ≥ 1µs, then the short-circuit protection within the IC activates.

### Switching FET Current Sensing and Slope Compensation

_{SC}from CS to the source of the switching MOSFET). Internal to the MAX16833, there is a current source that feeds current through R

_{SC}to create a voltage V

_{SC}. This voltage is added to the voltage across R

_{CS_FET}and the result is compared to a reference.

V_{CS} = V_{SC} + V_{CS_FET} |
(Eq. 25) |

V_{SCMIN} = 0.5 × (inductor current downslope - inductor current upslope) × R_{CS_FET} |
(Eq. 26) |

_{CS_FET}, has both the switching MOSFET current and the slope compensation current flowing through it.

*Figure 2. Slope compensation.*

(Eq. 27) |

(Eq. 28) | |

(Eq. 29) |

(Eq. 30) |

(Eq. 31) |

_{CS_FET}has been determined, R

_{SC}can be calculated as follows:

(Eq. 32) |

(Eq. 33) | |

(Eq. 34) |

(Eq. 35) |

### Error Amplifier Compensation

_{ZRHP}and the instability caused by the RHP zero can be avoided. The error amplifier must be compensated to ensure loop stability over all expected variations in operating conditions. The worst case RHP zero frequency is calculated as follows:

(Eq. 36) |

_{P2}, can be calculated as follows:

(Eq. 37) |

_{OUT}is the bulk output capacitance calculated above and R

_{OUT}is the effective output impedance.

(Eq. 38) |

_{LED}is the dynamic impedance of the LED string at the operating current in ohms.

_{COMP}and C

_{COMP}) from COMP to SGND. R

_{COMP}sets the crossover frequency and C

_{COMP}sets the integrator zero frequency. For optimum performance, use the following equations:

(Eq. 39) | |

(Eq. 40) |

(Eq. 41) | |

(Eq. 42) | |

(Eq. 43) | |

(Eq. 44) | |

(Eq. 45) |

### PWM Dimming

**Figure 3**shows a generic MAX16833 solution needing only three connections to create a boost or buck-boost LED driver.

*Figure 3. Three-terminal MAX16833 solution.*

- Use a slow dimming frequency. The human eye is typically incapable of distinguishing dimming ratios greater than 100Hz.
- Increase the switching frequency. This has the added benefit of reducing the necessary size of the power components. However, this decreases efficiency.
- Decrease the inductor value. This increases the inductor ripple current, which increases radiated emissions and decreases efficiency.

**Note:**At very slow dimming frequencies (e.g., 1Hz turn signal), careful consideration must be made to prevent the output of the boost converter from discharging to within 1.5V of the battery. This is because a short across the LEDs is detected by sensing the voltage difference between V

_{ISENSE+}and V

_{IN}. If V

_{ISENSE+}falls to within 1.5V of the battery voltage, then the %-overbar_pre%FLT%-overbar_post% output asserts low, erroneously indicating that a fault has occurred. The ISENSE+ input has a typical bias current of 200µA, which can discharge C

_{OUT}during the off phase of the PWMDIM signal. The OVP resistor-divider is also a leakage path that can discharge the output capacitor (see

**Figure 4**).

*Figure 4. Output capacitor leakage paths.*

### EMI Considerations

### Frequency Dithering

(Eq. 46) |

_{LFRAMP}should be slower than f

_{SW}by at least a factor of 10.

_{LFRAMP}can be calculated as follows:

(Eq. 47) |

*Figure 5. Not using LFRAMP.*

*Figure 6. Using LFRAMP to dither the internal oscillator frequency.*

_{DITH}.

(Eq. 48) | |

(Eq. 49) |

**Figure 7**demonstrates the effect of frequency dithering on the internal oscillator.

*Figure 7. LFRAMP in action.*

_{RT}and R

_{DITH}such that the internal oscillator operates between 100kHz and 1MHz.

_{SW}of 12.5% is desired.

(Eq. 50) |

*Figure 8. Output spectral content.*

### Proper Layout

*Figure 9. Simplified schematic.*

**Figure 10**shows current versus time for some of the external components. The high di/dt occurrences are circled in orange.

*Figure 10. Various current waveforms.*

*Figure 11. High di/dt paths critical to layout.*

### Other EMI Design Considerations

### Conclusion

**Figure 12**. By following the step-by-step design process outlined in this application note, significant time can be saved during the debug and test phase of the project.

*Figure 12. Typical application circuit based on example calculations.*

#### References

- For information on acoustic noise and capacitors for acoustic noise reduction, see www.murata.com/products/capacitor/solution/naki.html.