Reduce Digital Feedback in High Speed Data Conversion Systems - LTC2261
Sep 18 2017
Our newest high-speed ADC family achieves one third the power consumption of existing solutions without compromising AC performance. Operating from a low 1.8V supply, the 14-bit, 125Msps LTC2261 dissipates 125mW while maintaining 73.4dB SNR and 85dBc SFDR. Digital outputs can be configured as DDR CMOS, DDR LVDS or standard CMOS for minimizing FPGA pin count. An optional alternate bit polarity mode is provided to reduce the effects of digital feedback. The LTC2261 can also be used with an LTC6406 differential amplifier to provide a low power ADC + driver solution. Together, they dissipate 186mW and provide excellent AC performance.
Reduce Digital Feedback in High Speed Data Conversion Systems - LTC2261
Sep 18 2017
Our newest high-speed ADC family achieves one third the power consumption of existing solutions without compromising AC performance. Operating from a low 1.8V supply, the 14-bit, 125Msps LTC2261 dissipates 125mW while maintaining 73.4dB SNR and 85dBc SFDR. Digital outputs can be configured as DDR CMOS, DDR LVDS or standard CMOS for minimizing FPGA pin count. An optional alternate bit polarity mode is provided to reduce the effects of digital feedback. The LTC2261 can also be used with an LTC6406 differential amplifier to provide a low power ADC + driver solution. Together, they dissipate 186mW and provide excellent AC performance.
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