HSDCEP
High-Speed Data Converter Evaluation Platform (HSDCEP) Evaluates RF-DACs (≥ 1.5Gsps) and DUCs
Top
Overview
Features and Benefits
- Evaluates Maxim RF-DACs (≥ 1.5Gsps) and DUCs
- Four Parallel 16-Bit Output Buses (LVDS)
- Eight Clock-Capable Ports (LVDS)
- Output Rate Up to 1.25Gwps (LVDS) Per Output Bus
- 64M x 16-Bit Words Pattern Storage
- FPGA Configuration Stored on the PC and Downloaded Through the USB Port
- USB 2.0 Communication (480Mbps)
- Single 5V Supply Operation (Power Supply Included)
- LEDs to Display DUT and FPGA Status
- Simple Command-Prompt Software Interface (Enables Scripting to Run Command Sequences)
- FPGA Temperature Monitoring
Product Details
The high-speed data converter evaluation platform (HSDCEP) is a PC-based platform that provides a comprehensive tool for evaluating Maxim's RF digital-to-analog converters (RF-DACs) that have update rates ≥ 1.5Gsps and Maxim's digital upconverters (DUCs). The HSDCEP generates test patterns at rates of up to 1.25Gbps per data pin pair, on up to four parallel 16-bit LVDS buses. A data pattern with a maximum length of 64 mega-words (Mw), with each word being 16 bits wide, can be uploaded to the HSDCEP memory over a USB 2.0 port. The HSDCEP uses a high-speed Xilinx® Virtex®-5 FPGA to play back the data pattern to the DAC or DUC under evaluation.
The HSDCEP operates from a single 5V, 6A supply.
The HSDCEP software runs on PCs using the Windows XP® (SP2 or later) operating system with a USB 2.0 port.