Design Note 26: Auto-Zeroing A/D Offset Voltage

Introduction

Many A/D converters exhibit low offset errors with large full scale voltages. However, when the full scale voltage is decreased the V_OS, expressed in LSBs, increases. An A/D converter with 0.5 LSB of offset with a 5V full scale voltage can have 12.5 LSBs of offset with a 200mV full scale voltage. With the LTC1090 family of data acquisition systems and a few external components it is now possible to reduce the V_OS to only 0.25 LSB even with only a 200mV full scale voltage. This allows a user to digitize signals from low voltage transducers without the need for a gain stage. 

Circuit Description

The LTC1090 is a 10-bit data acquisition system with an eight channel multiplexer. The channel to be read is software selectable and all channels can be referred to the COM pin. In the circuit of Figure 1, CH0 is used to servo the COM pin giving the use a seven channel, offset corrected data acquisition system.

Figure 2 shows how the processor servos the COM pin to eliminate the A/D offset. CH0 is set to a 0.5 LSB voltage. The COM pin is servoed (by the pulse width modulated signal on port C2) so that the CH0 reading dithers between 0 and 1 LSB. The 100μF filters the PWM signal at the COM pin. Motorola MC68HC05 code is available from LTC to correct the LTC1090 offset and read the remaining seven channels. This algorithm will work in either unipolar or bipolar mode. (Unipolar is shown. For bipolar the 49.9Ω resistor is changed to 100Ω and the decision block is changed to “CH0≤0?”.)

After initializing the processor, the code sends a D_IN word to the LTC1090 requesting CH0 to be read with respect to COM. The next D_IN word that is sent will set up the A/D for the desired channel to be read while the CH0 data previously requested is shifted into the processor. If the CH0 D_OUT is 0 the C2 is cleared. If the CH0 D_OUT is greater than 0 then C2 is set. Another D_IN word requesting CH0 data is sent and the D_OUT data from the previously requested channel is read into the processor.

As can be seen from the LTC1090 data sheet the linearity and full scale errors with a 200mV full scale voltage are still within 0.5 LSB. To fully take advantage of the reduced offset of the auto-zero circuit the noise of the LTC1090 must be reduced. This can be done by averaging the data with the processor. Figure 3 shows a dynamic cross plot of the output data near half-scale after 64 averages. The top trace is the B9 transition of the LTC1090 while the bottom trace is a binary weight summation of B0 and B1. The horizontal scale is 1 LSB per major division. The averaged noise is much less than 1 LSB.

Authors

Guy Hoover

Guy Hoover is an engineer with over 30 years of experience at Linear Technology as a technician, an IC design engineer and an applications engineer.

He began his career at LTC as a technician, learning from Bob Dobkin, Bob Widlar, Carl Nelson and Tom Redfern working on a variety of products including op amps, comparators, switching regulators and ADCs. He also spent considerable time during this period writing test programs for the characterization of these parts.

The next part of his career at LTC was spent learning PSpice and designing SAR ADCs. Products designed by Guy include the LTC1197 family of 10-bit ADCs and the LTC1864 family of 12-bit and 16-bit ADCs.

Guy is currently an applications engineer in the Mixed Signal group specializing in SAR ADC applications support. This includes designing, writing Verilog code and test procedures for SAR ADC demo boards, helping customers optimize their products that contain LTC SAR ADCs, and writing hopefully useful applications articles that pass on to customers what he has learned about using these parts.

Guy graduated from DeVry Institute of Technology (Now DeVry University) with a BS in electronics engineering technology.

William Rempfer