ADALM2000 Activity: The Clapp Oscillator

Objective

Oscillators come in many forms. In this lab activity we will explore the Clapp configuration, which uses a tapped capacitor divider and a series LC resonator to provide the feedback path.

Background

A Clapp oscillator is, in effect, a series tuned version of the Colpitts oscillator. The Clapp oscillator is much like a Colpitts oscillator with the capacitive voltage divider producing the feedback signal. The addition of capacitor C3 in series with inductor L1 results in the difference in the two designs and distinguishes the Clapp oscillator from the Colpitts and Hartley configurations. As with all oscillators, the Barkhausen criteria must be adhered to, requiring a total gain of 1 and a phase shift of 0° from input to output. The frequency of oscillation can be calculated in the same way as any resonant circuit by using Equation 1.

Equation 1.

Ignoring the transistor capacitive effect between the base and collector, the resonant frequency may be calculated using the total equivalent capacitance (CTOT) given by Equation 2.

Equation 2.

Figure 1 shows a typical Clapp oscillator. The frequency determining series resonant tuned circuit is formed by L1 and CTOT and is used as the collector load impedance of the common base amplifier, Q1. A large inductance, L2, provides a DC path for the collector current while presenting a high impedance at the resonant frequency. This gives the amplifier a high gain only at the resonant frequency. This configuration uses a common base amplifier. The base of Q1 is biased to an appropriate DC level by resistor dividers R1 and R2 but is connected directly to an AC ground by C4. In common base mode, the output voltage waveform at the collector and the input signal at the emitter are in phase. This ensures that the fraction of the output signal from the node between C1 and C2, fed back from the tuned collector load to the emitter, provides the required positive feedback.

Figure 1. Basic Clapp oscillator.

The combination of C1 and C2 also forms a low frequency time constant with emitter resistor R3 to provide an average DC voltage level proportional to the amplitude of the feedback signal at the emitter of Q1. This provides automatic gain control of the amplifier to give the closed loop gain of 1 required by the oscillator. Emitter resistor R3 is not decoupled because the emitter node is used as the common base amplifier input. The base is connected to AC ground by C4, which will provide a very low reactance at the oscillator frequency.

Pre-Lab Simulations

Build a simulation schematic of the Clapp oscillator as shown in Figure 1. Calculate values for bias resistors R1 and R2 such that, with emitter resistor R3 set to 500 Ω, the collector current in NPN transistor Q1 is approximately 1 mA. Assume the circuit is powered from a 10 V power supply. Be sure to keep the sum of R1 and R2 (total resistance greater than 10 kΩ) as high as practical to keep the standing current in the resistor divider as low as practical. Remember that C4 provides an AC ground at the base of Q1. Set base decoupling capacitor C4 and output AC-coupling capacitor C5 to 0.1 μF. Calculate a value for L1 such that the resonant frequency, with C1 set equal to 1 nF and C2 set to 1 nF, will be close to 750 kHz. Use a high value for L3 of at least 10 mH. Perform a transient simulation. Save these results to compare with the measurements you take on the actual circuit and to include with your lab report.

Materials

  • ADALM2000 Active Learning Module
  • Solderless breadboard and jumper wire kit
  • One 2N3904 NPN transistor
  • One 1 μH inductor
  • One 10 μH inductor
  • One 100 μH inductor
  • One 10 mH inductor (L3)
  • One 1 nF capacitor (C1)
  • One 4.7 nF capacitor (C2)
  • Two 0.1 μF capacitors (marked 104)
  • One 470 Ω resistor (R3)
  • Other resistors, capacitors, and inductors as needed

Directions

Build the Clapp oscillator shown in Figure 2 using your solderless breadboard. Select standard values from your parts kit for bias resistors R1 and R2 such that, with emitter resistor R3 set to 470 Ω, the collector current in NPN transistor Q1 is approximately 1 mA. Start with C1 = 1 nF and C2 = 4.7 nF. The frequency of the oscillator can be from around 500 kHz to 2 MHz depending on the values chosen for C1, C2, C3, and L1. Calculate a value for C3 and select the closest value from your parts kit. This oscillator circuit can produce a sine wave output in excess of 10 V p-p at an approximate frequency set by the value chosen for L1.

Figure 2. Clapp oscillator.

Hardware Setup

See Figure 3 for the breadboard circuit.

Figure 3. Clapp oscillator breadboard circuit.

The squares indicate where to connect the ADALM2000 module AWG, scope channels, and power supplies. Be sure to only turn on the power supplies after you double check your wiring.

Procedure

Having finished construction of the Clapp oscillator, ensure that the circuit is oscillating correctly by turning on both the +5 V and –5 V power supplies and connecting one of the oscilloscope channels to the output terminal. It may be that the value of R3 is fairly critical, producing either a large, distorted waveform or an intermittent low or no output. To find the best value for R3, it can be replaced by a 1 kΩ potentiometer for experimentation to find the value that gives the best wave shape and reliable amplitude.

A plot example using R1 = 10 kΩ, R2 = 1 kΩ, R3 = 100 Ω, L1 = 100 μH, L2 = 10 μH, C1 = 1 nF, C2 = 4.7 nF, C3 = 10 nF is presented in Figure 4.

Figure 4. Clapp oscillator plot.

Questions

  1. What is the main function of a Clapp oscillator?
  2. The Clapp oscillator is a variation of which oscillator?
  3. Which component is added in the Clapp oscillator that differentiates it from the Colpitts oscillator?
  4. When is a Clapp oscillator preferred over a Colpitts oscillator?

You can find the answers at the StudentZone blog.

Author

Antoniu Miclaus

Antoniu Miclaus

Antoniu Miclaus is a software engineer at Analog Devices, where he works on embedded software for Linux and no-OS drivers, as well as ADI academic programs, QA automation, and process management. He started working at ADI in February 2017 in Cluj-Napoca, Romania. He holds an M.Sc. degree in software engineering from the Babes-Bolyai University and a B.Eng. degree in electronics and telecommunications from the Technical University of Cluj-Napoca.