Product Details

Demonstration circuit 1075B is a divide by 2/4/8 clock divider for use with high speed ADCs. Each assembly includes a clock divider followed by a re-timing stage used to produce sharp clock edges. Functionally, the DC1075B receives a high frequency sine wave which is attenuated and routed into the clock divider. The output of the clock divider is then routed to a D flip flop re-timing stage. This D flip flop is clocked by the original high frequency sine wave. This is critical to ensure signal integrity. The output of this re-timing stage is a CMOS signal suitable to be a clock source for high speed ADCs.

This circuit also is a model for designs involving FPGAs which serve as clock dividers. Whenever this is done, a D flip flop re-timing stage is required to ensure a low jitter clock signal.


Buy functionality exists in desktop site
Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.