Wideband Solutions


RadioVerse SDR transceiver technologies offer several evaluation options, including prototyping platforms, full evaluation systems, software simulation tools, device drivers, and more. Pick the evaluation option that best suits your requirements and stage in the design cycle.

RadioVerse also offers reference designs and 3rd party hardware for fast prototyping and moving from concept to market.

Design File Packages

Take the first step in your design process by downloading and thoroughly reviewing either the AD9361, AD9363, AD9364, AD9371, AD9375 or ADRV9008/9 design file package.


Visit the download page


ADRV9026 Evaluation Board

ADRV9009 Evaluation Board

AD9375 Evaluation Boards

AD9371 Evaluation Boards

Evaluation Options

There are several evaluation options available for the AD9371 integrated RF transceiver. Both the full product evaluation system and the prototyping platform are available in narrow tuning (ADRV9371-N/PCBZ) or wide tuning (ADRV9371-W/PCBZ) range options.

  FMC-Compatible Mezzanine Cards FMC Motherboards FPGA Design Control and Data Capture
Evaluation System
  • ADRV9371-N/PCBZ
  • ADRV9371-W/PCBZ
  • Xilinx® ZC706
  • Provided binary, verified with Xilinx JESD204B IP
  • Binary used to characterize IC performance
  • Operating system-agnostic API source in ANSI C
  • Command/control and data capture via Windows GUI
Prototyping Platform
  • ADRV9371-N/PCBZ
  • ADRV9371-W/PCBZ
  • Xilinx Development Boards
  • Publicly available HDL on GitHub, verified with Xilinx and Altera JESD204B cores
  • Open-source GUI, Windows®, Linux,® and OS-X
  • Open-source Linux IIO device driver
  • Streams data to GNU radio, MATLAB, and Simulink
Software Simulation Tool Filter Designer

Determine frequency settings, setup filter coefficients and sample rates, and design filters with minimal trial and error. Easily create custom filters, examine filter performance, and quickly generate coefficient for implementation, input into Simulink model or hardware.

AD9361 Evaluation Boards

AD9364 Evaluation Boards

Software Defined Radio (SDR) Modules

RF Front-End Reference Designs

 

Software

Evaluation Software

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SoftwareThis system is a software package consisting of a powerful Windows GUI, API source code, DLL, and Hardware Abstraction Layer (HAL). Additionally, the system includes a TCP/IP server that allows customer applications written in C#, MATLAB, LabView, Python, etc. to interface to the eval board. From there the customer may run automated testing. The OS- and platform-independent API will integrate into the customer’s software, eliminating the need to write device-specific code.


Two download options are available. One option is the full package including the GUI, HAL, DLL, API binary, etc. used with the evaluation hardware. The other option, intended to be integrated into the customer system, includes only API source code and the ARM firmware. Both are available via the download link below.


Download (for AD9371/AD9375 and ADRV9008/9)

Prototyping Software

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Prototyping SystemThis software package is available in binary and a publically maintained source (in github, for complete transparency and revision control). It includes a powerful multi-platform GUI (Windows, Linux, OS X), HDL for Xilinx, and Altera SoC and fabric-only devices. Also provided is Linux kernel device driver code (in the Linux Industrial Input/Output [IIO] framework) and multi-platform (Windows, Linux, OS X) library support with multiple back ends (local, network, USB, etc.). In addition are multiple language/framework bindings (C, C++, C#, MATLAB, Simulink, Python, GNURadio) to interface to the eval board for waveform development and automated testing. A customer can integrate any part of the prototyping platform (HDL, driver, or library) into his or her systems with permissive licenses. The prototype is extensible to accept custom IP (physical layers, or full modems for end systems). The system includes a Board Support Package (BSP) for MathWorks HDL Workflow Advisor.

AD9361 & AD9364: AD-FMCOMMS3-EBZ User Guide (Wiki)

AD9371 & AD9375: Prototyping Platform User Guide (Wiki)

ADRV9008 & ADRV9009: Prototyping Platform User Guide (Wiki)

No O/S Software Driver

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No OS Software DriverThis software consists of generic device drivers purely written in generic/ANSI-C (compliable for most ANSI C compilers that meet the iso9899:1990 specification) for a bare-metal, No-OS environment. Customers can port these drivers to many different environments and run on many different types of processors, from generic 16-bit MCU to 64-bit processors. The No-OS drivers are designed to run on the Analog Devices HDL reference design, but can also be run on processors that are either separated from the FPGA or integrated (hard or soft) in an SoC (FPGA + CPU) device. By using the No-OS drivers, the customer can eliminate writing device-specific code and directly integrate into end product software.

Download (AD9361 Only) (Wiki)
Download (AD9371 & AD9375) (Wiki)
Download (ADRV9008/9) (Wiki)

 

Software Design Tools

ADIsimRF

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ADIsimRF

ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.


Learn More

JESD204/JESD204B

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JESD204/JESD204B

The JESD204 and the JESD204B revision data converter serial interface standard was created through the JEDEC committee to standardize and reduce the number of data inputs/outputs between high-speed data converters and other devices such as FPGAs (field-programmable gate arrays). Analog Devices is an original participating member of the JEDEC JESD204 standards committee, and we have concurrently developed compliant data converter technology and tools and a comprehensive product roadmap to fully enable our customers to take advantage of this significant interfacing breakthrough. Analog Devices’ JESD204 Interface Framework is a system-level software and HDL package targeted at simplifying system development by providing a performance-optimized IP framework that integrates complex hardware such as high speed converters, transceivers, and clocks with various FPGA platforms.


Learn more - JESD204 Serial Interface Resources.

Altera FPGA Interoperability Report for AD9371/AD9375 (PDF)

MicroSemi FPGA Interoperability Report for AD9371/AD9375

Learn more about the JESD204 Interface Framework

Filter Design

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Design filters with minimum trial and error

AD9361 Filter Designer
  • Easily create custom filters
  • Examine filter performance
  • Quickly generate coefficient for implementation
  • Input into Simulink® model or hardware

Learn More - AD9371 & AD9375 (required)

Learn More - AD9361 (Wiki)

Learn More ADRV9009 &ADRV9008-1/-2 (required)

Model Based Design and Simulation

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Model Based Design

Simulate and verify AD9361 and AD9371 RF transceivers designs with RF Blockset (formerly SimRF) models, and predict the impact of RF imperfections on your test signals. You can rapidly design and test communications systems by performing system-level simulation, stream RF data, and use standard compliant communication signals with MATLAB® and Simulink®.


Learn More - AD9361 and AD9371

Xilinx Zynq SDR Support from MathWorks Communications System Toolbox

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Zynq-SDR-SupportPrototype and test Xilinx Zynq-based software-defined radio (SDR) systems using MATLAB and Simulink.

Learn More - AD9361

Reference Designs — Partners

RadioVerse also offers reference designs and 3rd party hardware for fast prototyping and moving from concept to market.

View Reference Designs

HJX Dual ADRV9009 SDR Development Board