MAXREFDES1299

The MAXREFDES1299 is a ready-to-use hardware platform for monitoring, balancing, and protecting the 4-cell battery packs in battery-powered applications such as power tools, smart devices, battery backups. Mobile devices require high-capacity rechargeable batteries to provide system power. These systems typically use lithium-ion (Li+) batteries due to their lightweight and high energy density. Every Li+ battery needs a protector to prevent damage and hazardous outcomes when subjected to abnormal voltages, current, and temperatures. Mobile devices need an accurate battery status indicator to prevent a premature or abrupt shutdown. Our fuel gauges monitor the remaining battery charge using a proprietary ModelGauge™ m5 algorithm to provide high accuracy state of charge (SOC). This reference design uses MAX17320 which monitors the voltage, current, temperature, determines battery SOC, and protects the battery from failures.

Other features include the following:

• Monitors cell voltages, pack current, pack temperatures, balances cells, and protects by controlling charge or discharge field-effect transistors (FETs).
• Hardware protection for overcurrent in charge/discharge, short circuit in discharge, overvoltage, undervoltage, over temperature and under temperature.
• External cell balancing up to 600 mA per cell.
• I2C Interface with clock frequency of 400kHz.

Applications

• Smartphones, Tablets, and 2-in-1 Laptops
• Medical Devices, Health and Fitness Monitors
• Digital Still, Video, and Action Cameras
• Handheld Computers, Radios, and Terminals
• Power Tools, Wireless Speakers, and Drones
• Smart Batteries and Battery Backup

A small size, 4-Cell Fuel Gauge using the MAX17320 is demonstrated for External Cell balancing application.

Table 1 provides an overview of the design specification.

This document describes the hardware shown in Figure 1. For more details, refer to the MAX17320 data sheet and the MAX17320 EV kit data sheet. This reference design is tested using Samsung INR38650 2500mAh battery and compatible with MAX17320GEVKIT software. The SDA, SCL and the GND pins of J6 in MAXREFDES1299 must be connected to SDA1, SCL1 and DGND pins of MAX17320GEVKIT respectively to validate this design using EV kit software.

Multi-cell battery packs face a common issue of Cell Imbalance. It affects the run time and the life cycle of the entire battery pack. Cell balancing is a suitable technique to overcome this problem and allows the battery pack to operate longer. Imbalance can be diagnosed by knowing the discrepancy in cell voltages and can be corrected either instantaneously or gradually through bypass cells with external/internal circuits. Balancing is done during charge or idle time. The balancing current and the time to balance can be chosen based on the end application.

Figure 2 shows the block diagram of MAXREFDES1299. In this design, external cell balancing is implemented for higher balancing current of 600mA at 4V.

Larger balancing current is required to balance the cells at a faster rate. The internal balancing switch supports maximum up to 100mA of balancing current. An external balancing circuitry is required for greater than 100mA balancing current. An external circuitry with P-FET and resistor is designed and shown in Figure 3. When cell balancing is enabled, and the cell balancing conditions are met, the internal switch turns ON and allows the current to flow through the R_balint and R_switch (9Ω typical). This current is limited by the sum of these resistors. When the internal cell balancing switch is ON, the voltage across the R_balint is applied to the Gate to Source terminals of the external balancing switch (P-FET), causing it to turn ON and thus allows the external balancing current to flow through the external balancing resistor R_balext.

The series resistors R_balint on the CELLX and CELLY pins must be selected to limit the internal balancing current.

From Figure 3, I_balint and I_balext current equations can be derived as,

Equation (1)

Equation (2)

Where,
I_balint is the internal balancing current
I_balext is the external balancing current
R_switch is 9Ω typical
V_cellmax is the maximum cell voltage during charging
R_balint is the series resistor to limit internal balancing current
R_balext is the external balancing resistor

This section describes how to select R_balint, P-FET and R_balext for the cell balancing.

Step 1: R_balint Selection

To avoid the IC getting heated up during cell balancing, R_balint resistors are designed for low internal cell balancing current. The value of these resistors should be selected to limit the internal cell balancing current to 100mA, the maximum rated current for these pins. In MAXREFDES1299, R_balint resistors are designed for 1mA internal cell balancing current. From equation (1), for V_cellmax of 4.2V, the R_balint can be calculated as follows,

From Equation (1),

A standard 2kΩ is selected for this design.

Power dissipation through R_balint:

So, R_balint of 2kΩ with power rating of 0.063W is chosen in this design for an internal balancing current of 1mA.

Step 2: R_balext Selection

In MAXREFDES1299, the external balancing resistor R_balext is designed for a balancing current of 600mA.

From Equation (2),

Power Dissipation through 7Ω resistor
= 0.6A x 0.6A x 7Ω = 2.52W

In this design, two parallel resistors of 13Ω each with a 2512, 2W package are chosen as a trade-off between the design solution size and R_balext power dissipation.

Current through each 13Ω resistor

Power Dissipation through 13Ω resistor
= 0.3A x 0.3A x 13Ω = 1.17W

Step 3: P-FET Selection

When the internal cell-balancing switch is turned ON, R_balint and (R_switch + R_balint) form a resistor-divider, generates a voltage of nearly V_cellmax /2 across the 2kΩ resistor. The voltage drop across the resistor is nearly 2.1V. Therefore, P-FET with Gate to Source threshold voltage less than 2.1V must be selected for proper turn on.

In MAXREFDES1299, to handle the rated balancing current of 600mA, TrenchFET SI1317DL-T1-GE3 with V_GS(th) of 0.8V is selected due to its low on-resistance and low Q_g and Q_gd.